Fix missing newline at end of file

Signed-off-by: Clifford Wolf <[email protected]>
YosysHQ · Aug 22, 2019 · 151db52 · 151db52
1 parent 2c8c8b3
commit 151db52
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/techlibs/anlogic/arith_map.v b/techlibs/anlogic/arith_map.v
@@ -81,4 +81,4 @@ module _80_anlogic_alu (A, B, CI, BI, X, Y, CO);
 
    /* End implementation */
    assign X = AA ^ BB;
-endmodule
+endmodule