A simple sail-riscv development environment for my personal use,
including my personal fork of sail-riscv
, the RVV Automatic Test Generator rvv-atg
,
and several versions of RVV ISA test suites.
To compile tests, run tests using Sail C emulator, and generate a report:
> make
Note:
- Change
PROJ_ROOT
in Makefile andlog_dir
inrun_test.py
before any making operation - Specify the expected
SEW
andLMUL
beforemake
if using tests inrvv_test_series
- Carefully modify
ASM_DIR
if using tests other thanrvv_test_series