Development log

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RSPwFPGAs edited this page Mar 8, 2021 · 5 revisions

[Date: Thu Jul 9 19:30:09 2020 +0800] Passed initialization of Virtio-PCI. Can be recognized as a Virtio-Net device.

[Date: Thu Jul 16 22:31:31 2020 +0800] Passed initialization of Virtio-Net. Can be recognized as an Ethernet device.

Dmesg and Ifconfig

IO trace from Qemu. virtio_fpga and virtio-net-pci.

[Date: Wed Jul 29 22:04:49 2020 +0800] Added 32bit DMA transaction to read VirtQueues. Passed ifconfig up/down, ping, ixy-pktgen.

[Date: Mon Mar 8 23:06:36 2021 +0800] Updated processing of controlq, transmitq, receiveq. Get same number and same length of packets with L1 loopback.