Changed argument key

osaca/parser/register.py

@@ -166,26 +166,26 @@ def __repr__(self):
     def equals(self, other, isa):
         if isa == "aarch64":
             # check for wildcards
-            if reg.prefix == self.WILDCARD or i_reg.prefix == self.WILDCARD:
-                if reg.shape is not None:
-                    if i_reg.shape is not None and (
-                        reg.shape == i_reg.shape or self.WILDCARD in (reg.shape + i_reg.shape)
+            if self.prefix == self.WILDCARD or other.prefix == self.WILDCARD:
+                if self.shape is not None:
+                    if other.shape is not None and (
+                        self.shape == other.shape or self.WILDCARD in (self.shape + other.shape)
                     ):
                         return True
                     return False
                 return True
             # check for prefix and shape
-            if reg.prefix != i_reg.prefix:
+            if self.prefix != other.prefix:
                 return False
-            if reg.shape is not None:
-                if i_reg.shape is not None and (
-                    reg.shape == i_reg.shape or self.WILDCARD in (reg.shape + i_reg.shape)
+            if self.shape is not None:
+                if other.shape is not None and (
+                    self.shape == other.shape or self.WILDCARD in (self.shape + other.shape)
                 ):
                     return True
                 return False
-            if reg.lanes is not None:
-                if i_reg.lanes is not None and (
-                    reg.lanes == i_reg.lanes or self.WILDCARD in (reg.lanes + i_reg.lanes)
+            if self.lanes is not None:
+                if other.lanes is not None and (
+                    self.lanes == other.lanes or self.WILDCARD in (self.lanes + other.lanes)
                 ):
                     return True
                 return False
@@ -196,47 +196,47 @@ def equals(self, other, isa):
                     return True
                 return False
             if isinstance(i_reg, RegisterOperand):
-                i_reg_name = i_reg.name
+                i_reg_name = other.name
             else:
                 i_reg_name = i_reg
             # check for wildcards
             if isinstance(reg, str):
                 return False
-            if i_reg_name is None and reg.name is None:
+            if i_reg_name is None and self.name is None:
                 return True
-            if i_reg_name == self.WILDCARD or reg.name == self.WILDCARD:
+            if i_reg_name == self.WILDCARD or self.name == self.WILDCARD:
                 return True
             # differentiate between vector registers (mm, xmm, ymm, zmm) and others (gpr)
             parser_x86 = ParserX86ATT()
             if parser_x86.is_vector_register(reg):
-                if reg.name.rstrip(string.digits).lower() == i_reg_name:
+                if self.name.rstrip(string.digits).lower() == i_reg_name:
                     # Consider masking and zeroing for AVX512
                     if consider_masking:
                         mask_ok = zero_ok = True
-                        if reg.mask is not None or i_reg.mask is not None:
+                        if self.mask is not None or other.mask is not None:
                             # one instruction is missing the masking while the other has it
                             mask_ok = False
                             # check for wildcard
                             if (
                                 (
-                                    reg.mask is not None
-                                    and reg.mask.rstrip(string.digits).lower() == i_reg.mask
+                                    self.mask is not None
+                                    and self.mask.rstrip(string.digits).lower() == other.mask
                                 )
-                                or reg.mask == self.WILDCARD
-                                or i_reg.mask == self.WILDCARD
+                                or self.mask == self.WILDCARD
+                                or other.mask == self.WILDCARD
                             ):
                                 mask_ok = True
-                            if bool(reg.zeroing) ^ bool("zeroing" in i_reg):
+                            if bool(self.zeroing) ^ bool("zeroing" in i_reg):
                                 # one instruction is missing zeroing while the other has it
                                 zero_ok = False
                                 # check for wildcard
-                                if i_reg.zeroing == self.WILDCARD or reg.zeroing == self.WILDCARD:
+                                if other.zeroing == self.WILDCARD or self.zeroing == self.WILDCARD:
                                     zero_ok = True
                             if not mask_ok or not zero_ok:
                                 return False
                     return True
             else:
-                if reg.name.rstrip(string.digits).lower() == i_reg_name:
+                if self.name.rstrip(string.digits).lower() == i_reg_name:
                     return True
                 if i_reg_name == "gpr":
                     return True