Skip to content

Adding Nucleo_f401re with examples #391

New issue

Have a question about this project? Sign up for a free GitHub account to open an issue and contact its maintainers and the community.

By clicking “Sign up for GitHub”, you agree to our terms of service and privacy statement. We’ll occasionally send you account related emails.

Already on GitHub? Sign in to your account

Open
wants to merge 1 commit into
base: community-2021
Choose a base branch
from
Open
Show file tree
Hide file tree
Changes from all commits
Commits
File filter

Filter by extension

Filter by extension

Conversations
Failed to load comments.
Loading
Jump to
Jump to file
Failed to load files.
Loading
Diff view
Diff view
898 changes: 898 additions & 0 deletions arch/ARM/STM32/devices/stm32f401/stm32-adc.adb

Large diffs are not rendered by default.

747 changes: 747 additions & 0 deletions arch/ARM/STM32/devices/stm32f401/stm32-adc.ads

Large diffs are not rendered by default.

689 changes: 689 additions & 0 deletions arch/ARM/STM32/devices/stm32f401/stm32-device.adb

Large diffs are not rendered by default.

434 changes: 434 additions & 0 deletions arch/ARM/STM32/devices/stm32f401/stm32-device.ads

Large diffs are not rendered by default.

436 changes: 436 additions & 0 deletions arch/ARM/STM32/devices/stm32f401/stm32-pwm.adb

Large diffs are not rendered by default.

148 changes: 148 additions & 0 deletions arch/ARM/STM32/devices/stm32f401/stm32-rcc.adb
Original file line number Diff line number Diff line change
@@ -0,0 +1,148 @@
------------------------------------------------------------------------------
-- --
-- Copyright (C) 2015, AdaCore --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions are --
-- met: --
-- 1. Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- 2. Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in --
-- the documentation and/or other materials provided with the --
-- distribution. --
-- 3. Neither the name of the copyright holder nor the names of its --
-- contributors may be used to endorse or promote products derived --
-- from this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT --
-- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, --
-- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY --
-- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT --
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --
-- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------

with Ada.Unchecked_Conversion;
with STM32.Device; use STM32.Device;
with STM32_SVD.PWR; use STM32_SVD.PWR;
with STM32_SVD.RCC; use STM32_SVD.RCC;

package body STM32.RCC is

function To_AHB1RSTR_T is new Ada.Unchecked_Conversion
(UInt32, AHB1RSTR_Register);
function To_AHB2RSTR_T is new Ada.Unchecked_Conversion
(UInt32, AHB2RSTR_Register);
function To_APB1RSTR_T is new Ada.Unchecked_Conversion
(UInt32, APB1RSTR_Register);
function To_APB2RSTR_T is new Ada.Unchecked_Conversion
(UInt32, APB2RSTR_Register);

---------------------------------------------------------------------------
------- Enable/Disable/Reset Routines -----------------------------------
---------------------------------------------------------------------------

procedure CRC_Clock_Enable is
begin
RCC_Periph.AHB1ENR.CRCEN := True;
end CRC_Clock_Enable;

procedure WWDG_Clock_Enable is
begin
RCC_Periph.APB1ENR.WWDGEN := True;
end WWDG_Clock_Enable;

procedure SYSCFG_Clock_Enable is
begin
RCC_Periph.APB2ENR.SYSCFGEN := True;
end SYSCFG_Clock_Enable;

procedure AHB1_Force_Reset
is
begin
RCC_Periph.AHB1RSTR := To_AHB1RSTR_T (16#FFFF_FFFF#);
end AHB1_Force_Reset;

procedure AHB1_Release_Reset is
begin
RCC_Periph.AHB1RSTR := To_AHB1RSTR_T (0);
end AHB1_Release_Reset;

procedure AHB2_Force_Reset is
begin
RCC_Periph.AHB2RSTR := To_AHB2RSTR_T (16#FFFF_FFFF#);
end AHB2_Force_Reset;

procedure AHB2_Release_Reset is
begin
RCC_Periph.AHB2RSTR := To_AHB2RSTR_T (0);
end AHB2_Release_Reset;

procedure APB1_Force_Reset is
begin
RCC_Periph.APB1RSTR := To_APB1RSTR_T (16#FFFF_FFFF#);
end APB1_Force_Reset;

procedure APB1_Release_Reset is
begin
RCC_Periph.APB1RSTR := To_APB1RSTR_T (0);
end APB1_Release_Reset;

procedure APB2_Force_Reset is
begin
RCC_Periph.APB2RSTR := To_APB2RSTR_T (16#FFFF_FFFF#);
end APB2_Force_Reset;

procedure APB2_Release_Reset is
begin
RCC_Periph.APB2RSTR := To_APB2RSTR_T (0);
end APB2_Release_Reset;

procedure CRC_Force_Reset is
begin
RCC_Periph.AHB1RSTR.CRCRST := True;
end CRC_Force_Reset;

procedure CRC_Release_Reset is
begin
RCC_Periph.AHB1RSTR.CRCRST := False;
end CRC_Release_Reset;

procedure OTGFS_Force_Reset is
begin
RCC_Periph.AHB2RSTR.OTGFSRST := True;
end OTGFS_Force_Reset;

procedure OTGFS_Release_Reset is
begin
RCC_Periph.AHB2RSTR.OTGFSRST := False;
end OTGFS_Release_Reset;

procedure WWDG_Force_Reset is
begin
RCC_Periph.APB1RSTR.WWDGRST := True;
end WWDG_Force_Reset;

procedure WWDG_Release_Reset is
begin
RCC_Periph.APB1RSTR.WWDGRST := False;
end WWDG_Release_Reset;

procedure SYSCFG_Force_Reset is
begin
RCC_Periph.APB2RSTR.SYSCFGRST := True;
end SYSCFG_Force_Reset;

procedure SYSCFG_Release_Reset is
begin
RCC_Periph.APB2RSTR.SYSCFGRST := False;
end SYSCFG_Release_Reset;

end STM32.RCC;
83 changes: 83 additions & 0 deletions arch/ARM/STM32/devices/stm32f401/stm32-rcc.ads
Original file line number Diff line number Diff line change
@@ -0,0 +1,83 @@
------------------------------------------------------------------------------
-- --
-- Copyright (C) 2015, AdaCore --
-- --
-- Redistribution and use in source and binary forms, with or without --
-- modification, are permitted provided that the following conditions are --
-- met: --
-- 1. Redistributions of source code must retain the above copyright --
-- notice, this list of conditions and the following disclaimer. --
-- 2. Redistributions in binary form must reproduce the above copyright --
-- notice, this list of conditions and the following disclaimer in --
-- the documentation and/or other materials provided with the --
-- distribution. --
-- 3. Neither the name of the copyright holder nor the names of its --
-- contributors may be used to endorse or promote products derived --
-- from this software without specific prior written permission. --
-- --
-- THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS --
-- "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT --
-- LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR --
-- A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT --
-- HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, --
-- SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT --
-- LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, --
-- DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY --
-- THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT --
-- (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE --
-- OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. --
-- --
------------------------------------------------------------------------------
pragma Restrictions (No_Elaboration_Code);

package STM32.RCC is

-- type RCC_System_Clocks is record
-- SYSCLK : UInt32;
-- HCLK : UInt32;
-- PCLK1 : UInt32;
-- PCLK2 : UInt32;
-- TIMCLK1 : UInt32;
-- TIMCLK2 : UInt32;
-- end record;
--
-- function System_Clock_Frequencies return RCC_System_Clocks;

-- Part below is obsolete and should be moved to the corresponding driver.

procedure CRC_Clock_Enable with Inline;
-- procedure CCMDATARAMEN_Clock_Enable with Inline;
-- procedure DMA2D_Clock_Enable with Inline;
procedure WWDG_Clock_Enable with Inline;

-- procedure SDIO_Clock_Enable with Inline;
procedure SYSCFG_Clock_Enable with Inline;

procedure AHB1_Force_Reset with Inline;
procedure AHB1_Release_Reset with Inline;
procedure AHB2_Force_Reset with Inline;
procedure AHB2_Release_Reset with Inline;
procedure APB1_Force_Reset with Inline;
procedure APB1_Release_Reset with Inline;
procedure APB2_Force_Reset with Inline;
procedure APB2_Release_Reset with Inline;

procedure CRC_Force_Reset with Inline;
procedure CRC_Release_Reset with Inline;

-- procedure DMA2D_Force_Reset with Inline;
-- procedure DMA2D_Release_Reset with Inline;

procedure OTGFS_Force_Reset with Inline;
procedure OTGFS_Release_Reset with Inline;

procedure WWDG_Force_Reset with Inline;
procedure WWDG_Release_Reset with Inline;

-- procedure SDIO_Force_Reset with Inline;
-- procedure SDIO_Release_Reset with Inline;

procedure SYSCFG_Force_Reset with Inline;
procedure SYSCFG_Release_Reset with Inline;

end STM32.RCC;
Loading