Updated Kernel Swap Example

Author: Rajat Sarkari

sys_opt/Makefile

@@ -0,0 +1,7 @@
+COMMON_REPO=../common/
+
+docs: README.md
+
+README.md:summary.json
+	$(COMMON_REPO)/utility/readme_gen/gs_summary_subdir.py
+

sys_opt/README.md

@@ -0,0 +1,18 @@
+System Optimization Examples
+==================================
+System Optimization examples focussed towards hardware optimization using HLS C/C++ kernels for Xilinx devices.
+
+ __Examples Table__ 
+
+Example        | Description           | Key Concepts / Keywords 
+---------------|-----------------------|-------------------------
+[kernel_swap/][]|This example shows how host can swap the kernels and share same buffer between two kernels which are exist in separate binary containers. Dynamic platforms does not persist the buffer data so host has to migrate data from device to host memory before swapping the next kernel. After kernel swap, host has to migrate the buffer back to device.|__Key__ __Concepts__<br> - Handling Buffer sharing across multiple binaries<br> - Multiple Kernel Binaries<br>__Keywords__<br> - clEnqueueMigrateMemObjects()<br> - CL_MIGRATE_MEM_OBJECT_HOST
+[multiple_devices/][]|This example show how to take advantage of multiple FPGAs on a system. It will show how to initialized an OpenCL context, allocate memory on the two devices and execute a kernel on each FPGA.|__Key__ __Concepts__<br> - OpenCL API<br> - Multi-FPGA Execution<br> - Event Handling<br>__Keywords__<br> - cl_device_id<br> - clGetDeviceIDs()
+[multiple_process/][]|This example will demonstrate how to run multiple processes to utilize multiple kernels simultaneously on an FPGA device. Multiple processes can share access to the same device provided each process uses the same xclbin. Processes share access to all device resources but there is no support for exclusive access to resources by any process.|__Key__ __Concepts__<br> - Concurrent execution<br> - Multiple HLS kernels<br> - Multiple Process Support<br>__Keywords__<br> - PID<br> - fork<br> - XCL_MULTIPROCESS_MODE<br> - multiprocess
+[slr_assign/][]|This is simple example to describe SLR assignment information for a platform design. This example highlights how to provide extra input to assign the logic of the kernel into a nominated SLR. In this example we are assigning first kernel(Vector Multiplication) to SLR0 and assigning the second kernel(Vector Addition) to SLR1|__Key__ __Concepts__<br> - SLR Assignments<br>__Keywords__<br> - slr
+
+[.]:.
+[kernel_swap/]:kernel_swap/
+[multiple_devices/]:multiple_devices/
+[multiple_process/]:multiple_process/
+[slr_assign/]:slr_assign/

sys_opt/kernel_swap/README.md

@@ -1,4 +1,4 @@
-Vector Add - Vector Multiplication for XPR Devices
+Kernel Swap
 ======================
 
 This example shows how host can swap the kernels and share same buffer between two kernels which are exist in separate binary containers. Dynamic platforms does not persist the buffer data so host has to migrate data from device to host memory before swapping the next kernel. After kernel swap, host has to migrate the buffer back to device.
@@ -16,10 +16,6 @@ xilinx_u250_qdma|Xilinx Alveo U250|VITIS 2019.2
 xilinx_u250_xdma|Xilinx Alveo U250|VITIS 2019.2
 xilinx_u280_xdma|Xilinx Alveo U280|VITIS 2019.2
 xilinx_u50_xdma|Xilinx Alveo U50|VITIS 2019.2
-zc702_base|Xilinx Zynq-7000 SoC ZC702|VITIS 2019.2
-zc706_base|Xilinx Zynq-7000 SoC ZC706|VITIS 2019.2
-zcu102_base|Xilinx UltraScale+ MPSoC ZCU102|VITIS 2019.2
-zcu104_base|Xilinx UltraScale+ MPSoC ZCU104|VITIS 2019.2
 
 
 ##  DESIGN FILES

sys_opt/kernel_swap/description.json

@@ -3,7 +3,7 @@
         "zc", 
 	    "zed"
      ],
-    "name": "Vector Add - Vector Multiplication for XPR Devices", 
+    "name": "Kernel Swap", 
     "contributors": [
         {
             "url": "http://www.xilinx.com", 

sys_opt/summary.json

@@ -0,0 +1,8 @@
+{
+    "overview": [
+        "System Optimization Examples"
+    ],
+    "description": [
+        "System Optimization examples focussed towards hardware optimization using HLS C/C++ kernels for Xilinx devices."
+    ]
+}