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lines changed Original file line number Diff line number Diff line change @@ -52,7 +52,7 @@ static void wait_loop(uint32_t timeout)
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// On L4 platforms we've seen unstable PLL CLK configuraiton
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- // when DEEP SLEEP exits just few µs after being entered
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+ // when DEEP SLEEP exits just few µs after being entered
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// So we need to force MSI usage before setting clocks again
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static void ForcePeriphOutofDeepSleep (void )
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{
@@ -151,7 +151,25 @@ void hal_sleep(void)
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core_util_critical_section_enter ();
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// Request to enter SLEEP mode
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+ #if TARGET_STM32L4
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+ // State Transitions (see 5.3 Low-power modes, Fig. 13):
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+ // * (opt): Low Power Run (LPR) Mode -> Run Mode
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+ // * Run Mode -> Sleep
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+ // --- Wait for Interrupt --
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+ // * Sleep -> Run Mode
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+ // * (opt): Run Mode -> Low Power Run Mode
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+
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+ // [5.4.1 Power control register 1 (PWR_CR1)]
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+ // LPR: When this bit is set, the regulator is switched from main mode (MR) to low-power mode (LPR).
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+ int lowPowerMode = PWR -> CR1 & PWR_CR1_LPR ;
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+ if (lowPowerMode ) {
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+ HAL_PWR_EnterSLEEPMode (PWR_MAINREGULATOR_ON , PWR_SLEEPENTRY_WFI );
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+ } else {
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+ HAL_PWR_EnterSLEEPMode (PWR_LOWPOWERREGULATOR_ON , PWR_SLEEPENTRY_WFI );
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+ }
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+ #else
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HAL_PWR_EnterSLEEPMode (PWR_MAINREGULATOR_ON , PWR_SLEEPENTRY_WFI );
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+ #endif
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// Enable IRQs
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core_util_critical_section_exit ();
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