diff --git a/build_all.sh b/build_all.sh index b42ed40..546ac50 100755 --- a/build_all.sh +++ b/build_all.sh @@ -1,6 +1,6 @@ #!/bin/bash -ROOT="/home/manuale97/my_repositories/demo_rvsummit_23" +ROOT=`realpath .` BAREMETAL_DIR="${ROOT}/bao-baremetal-guest" BAO_DIR="${ROOT}/bao-hypervisor" diff --git a/dts/ariane-dual-core.dtb b/dts/ariane-dual-core.dtb deleted file mode 100644 index e69de29..0000000 diff --git a/dts/culsans-bao-linux.dtb b/dts/culsans-bao-linux.dtb deleted file mode 100644 index 9e0a9a7..0000000 Binary files a/dts/culsans-bao-linux.dtb and /dev/null differ diff --git a/dts/culsans-bao-linux.dts b/dts/culsans-bao-linux.dts deleted file mode 100644 index 79441c3..0000000 --- a/dts/culsans-bao-linux.dts +++ /dev/null @@ -1,164 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-dev"; - model = "eth,ariane-bare"; - chosen { - stdout-path = "/soc/uart@10000000:115200"; - }; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <25000000>; // 25 MHz - CPU0: cpu@0 { - clock-frequency = <50000000>; // 50 MHz - device_type = "cpu"; - reg = <0>; - status = "okay"; - compatible = "eth, ariane", "riscv"; - riscv,isa = "rv64imafdch"; - mmu-type = "riscv,sv39"; - tlb-split; - // HLIC - hart local interrupt controller - CPU0_intc: interrupt-controller { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - CPU1: cpu@1 { - clock-frequency = <50000000>; // 50 MHz - device_type = "cpu"; - reg = <1>; - status = "okay"; - compatible = "eth, ariane", "riscv"; - riscv,isa = "rv64imafdch"; - mmu-type = "riscv,sv39"; - tlb-split; - // HLIC - hart local interrupt controller - CPU1_intc: interrupt-controller { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - }; - memory@80200000 { - device_type = "memory"; - reg = <0x0 0x80200000 0x0 0x20000000>; - }; - // leds { - // compatible = "gpio-leds"; - // heartbeat-led { - // gpios = <&xlnx_gpio 1 0>; - // linux,default-trigger = "heartbeat"; - // retain-state-suspended; - // }; - // }; - L26: soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-soc", "simple-bus"; - ranges; - // clint@2000000 { - // compatible = "riscv,clint0"; - // interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7 &CPU1_intc 3 &CPU1_intc 7>; - // // interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7>; - // reg = <0x0 0x2000000 0x0 0xc0000>; - // reg-names = "control"; - // }; - PLIC0: interrupt-controller@c000000 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9 &CPU1_intc 11 &CPU1_intc 9>; - // interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>; - reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,max-priority = <7>; - riscv,ndev = <30>; - }; - // Specifying the interrupt controller in the devicetree is not necessary. - // Furthermore, the IRQ 65535 will cause a `hwirq 0xffff is too large` during - // Linux boot (occured with mainline linux 5.14.0). - // debug-controller@0 { - // compatible = "riscv,debug-013"; - // interrupts-extended = <&CPU0_intc 65535>; - // reg = <0x0 0x0 0x0 0x1000>; - // reg-names = "control"; - // }; - uart@10000000 { - compatible = "ns16550a"; - reg = <0x0 0x10000000 0x0 0x1000>; - clock-frequency = <50000000>; - current-speed = <115200>; - interrupt-parent = <&PLIC0>; - interrupts = <1>; - reg-shift = <2>; // regs are spaced on 32 bit boundary - reg-io-width = <4>; // only 32-bit access are supported - }; - // timer@18000000 { - // compatible = "pulp,apb_timer"; - // interrupts = <0x00000004 0x00000005 0x00000006 0x00000007>; - // reg = <0x00000000 0x18000000 0x00000000 0x00001000>; - // interrupt-parent = <&PLIC0>; - // reg-names = "control"; - // }; - // xps-spi@20000000 { - // compatible = "xlnx,xps-spi-2.00.b", "xlnx,xps-spi-2.00.a"; - // #address-cells = <1>; - // #size-cells = <0>; - // interrupt-parent = <&PLIC0>; - // interrupts = < 2 2 >; - // reg = < 0x0 0x20000000 0x0 0x1000 >; - // xlnx,family = "kintex7"; - // xlnx,fifo-exist = <0x1>; - // xlnx,num-ss-bits = <0x1>; - // xlnx,num-transfer-bits = <0x8>; - // xlnx,sck-ratio = <0x4>; - - // mmc@0 { - // compatible = "mmc-spi-slot"; - // reg = <0>; - // spi-max-frequency = <12500000>; - // voltage-ranges = <3300 3300>; - // disable-wp; - // }; - - // // mmc-slot@0 { - // // compatible = "fsl,mpc8323rdb-mmc-slot", "mmc-spi-slot"; - // // reg = <0>; //Chip select 0 - // // spi-max-frequency = <12500000>; - // // voltage-ranges = <3300 3300>; - // // //interrupts = < 2 2 >; - // // //interrupt-parent = <&PLIC0>; - // // }; - // }; - // eth: lowrisc-eth@30000000 { - // compatible = "lowrisc-eth"; - // device_type = "network"; - // interrupt-parent = <&PLIC0>; - // interrupts = <3 0>; - // local-mac-address = [00 18 3e 02 e3 7f]; // This needs to change if more than one GenesysII on a VLAN - // reg = <0x0 0x30000000 0x0 0x8000>; - // }; - // xlnx_gpio: gpio@40000000 { - // #gpio-cells = <2>; - // compatible = "xlnx,xps-gpio-1.00.a"; - // gpio-controller ; - // reg = <0x0 0x40000000 0x0 0x10000 >; - // xlnx,all-inputs = <0x0>; - // xlnx,all-inputs-2 = <0x0>; - // xlnx,dout-default = <0x0>; - // xlnx,dout-default-2 = <0x0>; - // xlnx,gpio-width = <0x8>; - // xlnx,gpio2-width = <0x8>; - // xlnx,interrupt-present = <0x0>; - // xlnx,is-dual = <0x1>; - // xlnx,tri-default = <0xffffffff>; - // xlnx,tri-default-2 = <0xffffffff>; - // }; - }; -}; \ No newline at end of file diff --git a/dts/culsans-linux.dts b/dts/culsans-linux.dts deleted file mode 100644 index ea305d4..0000000 --- a/dts/culsans-linux.dts +++ /dev/null @@ -1,162 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-dev"; - model = "eth,ariane-bare"; - chosen { - stdout-path = "/soc/uart@10000000:115200"; - }; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <25000000>; // 25 MHz - CPU0: cpu@0 { - clock-frequency = <50000000>; // 50 MHz - device_type = "cpu"; - reg = <0>; - status = "okay"; - compatible = "eth, ariane", "riscv"; - riscv,isa = "rv64imafdc"; - mmu-type = "riscv,sv39"; - tlb-split; - // HLIC - hart local interrupt controller - CPU0_intc: interrupt-controller { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - CPU1: cpu@1 { - clock-frequency = <50000000>; // 50 MHz - device_type = "cpu"; - reg = <1>; - status = "okay"; - compatible = "eth, ariane", "riscv"; - riscv,isa = "rv64imafdc"; - mmu-type = "riscv,sv39"; - tlb-split; - // HLIC - hart local interrupt controller - CPU1_intc: interrupt-controller { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - }; - memory@80000000 { - device_type = "memory"; - reg = <0x0 0x80200000 0x0 0x20000000>; - }; - // leds { - // compatible = "gpio-leds"; - // heartbeat-led { - // gpios = <&xlnx_gpio 1 0>; - // linux,default-trigger = "heartbeat"; - // retain-state-suspended; - // }; - // }; - L26: soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-soc", "simple-bus"; - ranges; - clint@2000000 { - compatible = "riscv,clint0"; - interrupts-extended = <&CPU0_intc 3 &CPU0_intc 7 &CPU1_intc 3 &CPU1_intc 7>; - reg = <0x0 0x2000000 0x0 0xc0000>; - reg-names = "control"; - }; - PLIC0: interrupt-controller@c000000 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9 &CPU1_intc 11 &CPU1_intc 9>; - reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,max-priority = <7>; - riscv,ndev = <30>; - }; - // Specifying the interrupt controller in the devicetree is not necessary. - // Furthermore, the IRQ 65535 will cause a `hwirq 0xffff is too large` during - // Linux boot (occured with mainline linux 5.14.0). - // debug-controller@0 { - // compatible = "riscv,debug-013"; - // interrupts-extended = <&CPU0_intc 65535>; - // reg = <0x0 0x0 0x0 0x1000>; - // reg-names = "control"; - // }; - uart@10000000 { - compatible = "ns16550a"; - reg = <0x0 0x10000000 0x0 0x1000>; - clock-frequency = <50000000>; - current-speed = <115200>; - interrupt-parent = <&PLIC0>; - interrupts = <1>; - reg-shift = <2>; // regs are spaced on 32 bit boundary - reg-io-width = <4>; // only 32-bit access are supported - }; - timer@18000000 { - compatible = "pulp,apb_timer"; - interrupts = <0x00000004 0x00000005 0x00000006 0x00000007>; - reg = <0x00000000 0x18000000 0x00000000 0x00001000>; - interrupt-parent = <&PLIC0>; - reg-names = "control"; - }; - // xps-spi@20000000 { - // compatible = "xlnx,xps-spi-2.00.b", "xlnx,xps-spi-2.00.a"; - // #address-cells = <1>; - // #size-cells = <0>; - // interrupt-parent = <&PLIC0>; - // interrupts = < 2 2 >; - // reg = < 0x0 0x20000000 0x0 0x1000 >; - // xlnx,family = "kintex7"; - // xlnx,fifo-exist = <0x1>; - // xlnx,num-ss-bits = <0x1>; - // xlnx,num-transfer-bits = <0x8>; - // xlnx,sck-ratio = <0x4>; - - // mmc@0 { - // compatible = "mmc-spi-slot"; - // reg = <0>; - // spi-max-frequency = <12500000>; - // voltage-ranges = <3300 3300>; - // disable-wp; - // }; - - // // mmc-slot@0 { - // // compatible = "fsl,mpc8323rdb-mmc-slot", "mmc-spi-slot"; - // // reg = <0>; //Chip select 0 - // // spi-max-frequency = <12500000>; - // // voltage-ranges = <3300 3300>; - // // //interrupts = < 2 2 >; - // // //interrupt-parent = <&PLIC0>; - // // }; - // }; - // eth: lowrisc-eth@30000000 { - // compatible = "lowrisc-eth"; - // device_type = "network"; - // interrupt-parent = <&PLIC0>; - // interrupts = <3 0>; - // local-mac-address = [00 18 3e 02 e3 7f]; // This needs to change if more than one GenesysII on a VLAN - // reg = <0x0 0x30000000 0x0 0x8000>; - // }; - // xlnx_gpio: gpio@40000000 { - // #gpio-cells = <2>; - // compatible = "xlnx,xps-gpio-1.00.a"; - // gpio-controller ; - // reg = <0x0 0x40000000 0x0 0x10000 >; - // xlnx,all-inputs = <0x0>; - // xlnx,all-inputs-2 = <0x0>; - // xlnx,dout-default = <0x0>; - // xlnx,dout-default-2 = <0x0>; - // xlnx,gpio-width = <0x8>; - // xlnx,gpio2-width = <0x8>; - // xlnx,interrupt-present = <0x0>; - // xlnx,is-dual = <0x1>; - // xlnx,tri-default = <0xffffffff>; - // xlnx,tri-default-2 = <0xffffffff>; - // }; - }; -}; \ No newline at end of file diff --git a/dts/cva6-ariane-minimal-bao.dtb b/dts/cva6-ariane-minimal-bao.dtb deleted file mode 100644 index 0d1cd43..0000000 Binary files a/dts/cva6-ariane-minimal-bao.dtb and /dev/null differ diff --git a/dts/cva6-ariane-minimal-bao.dts b/dts/cva6-ariane-minimal-bao.dts deleted file mode 100644 index 8e6bdbc..0000000 --- a/dts/cva6-ariane-minimal-bao.dts +++ /dev/null @@ -1,105 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-dev"; - model = "eth,ariane-bare"; - chosen { - stdout-path = "/soc/uart@10000000:115200"; - }; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <25000000>; // 25 MHz - CPU0: cpu@0 { - clock-frequency = <50000000>; // 50 MHz - device_type = "cpu"; - reg = <0>; - status = "okay"; - compatible = "eth, ariane", "riscv"; - riscv,isa = "rv64imafdch"; - mmu-type = "riscv,sv39"; - tlb-split; - // HLIC - hart local interrupt controller - CPU0_intc: interrupt-controller { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - }; - memory@80200000 { - device_type = "memory"; - reg = <0x0 0x80200000 0x0 0x20E00000>; - }; - - // no leds - - L26: soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-soc", "simple-bus"; - ranges; - - PLIC0: interrupt-controller@c000000 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>; - reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,max-priority = <7>; - riscv,ndev = <30>; - }; - - uart@10000000 { - compatible = "ns16750"; - reg = <0x0 0x10000000 0x0 0x1000>; - clock-frequency = <50000000>; - current-speed = <115200>; - interrupt-parent = <&PLIC0>; - interrupts = <1>; - reg-shift = <2>; // regs are spaced on 32 bit boundary - reg-io-width = <4>; // only 32-bit access are supported - }; - - // no timer - // no spi - // no eth - // no GPIO - - idma0: master@50000000{ - compatible = "pulp,idma"; - reg = <0x0 0x50000000 0x0 0x00001000>; - // interrupts = <15>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - }; - - idma1: master@50001000{ - compatible = "pulp,idma"; - reg = <0x0 0x50001000 0x0 0x00001000>; - // interrupts = <13>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - }; - - idma2: master@50002000{ - compatible = "pulp,idma"; - reg = <0x0 0x50002000 0x0 0x00001000>; - // interrupts = <11>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - }; - - idma3: master@50003000{ - compatible = "pulp,idma"; - reg = <0x0 0x50003000 0x0 0x00001000>; - // interrupts = <9>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - }; - - }; -}; diff --git a/dts/cva6-ariane-minimal.dtb b/dts/cva6-ariane-minimal.dtb deleted file mode 100644 index c62d06e..0000000 Binary files a/dts/cva6-ariane-minimal.dtb and /dev/null differ diff --git a/dts/cva6-ariane-minimal.dts b/dts/cva6-ariane-minimal.dts deleted file mode 100644 index 79bcff3..0000000 --- a/dts/cva6-ariane-minimal.dts +++ /dev/null @@ -1,177 +0,0 @@ -/dts-v1/; - -/ { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-dev"; - model = "eth,ariane-bare"; - chosen { - stdout-path = "/soc/uart@10000000:115200"; - }; - cpus { - #address-cells = <1>; - #size-cells = <0>; - timebase-frequency = <25000000>; // 25 MHz - CPU0: cpu@0 { - clock-frequency = <50000000>; // 50 MHz - device_type = "cpu"; - reg = <0>; - status = "okay"; - compatible = "eth, ariane", "riscv"; - riscv,isa = "rv64imafdch"; - mmu-type = "riscv,sv39"; - tlb-split; - // HLIC - hart local interrupt controller - CPU0_intc: interrupt-controller { - #interrupt-cells = <1>; - interrupt-controller; - compatible = "riscv,cpu-intc"; - }; - }; - }; - memory@80200000 { - device_type = "memory"; - reg = <0x0 0x80200000 0x0 0x3FE00000>; - }; - leds { - compatible = "gpio-leds"; - heartbeat-led { - gpios = <&xlnx_gpio 1 0>; - linux,default-trigger = "heartbeat"; - retain-state-suspended; - }; - }; - L26: soc { - #address-cells = <2>; - #size-cells = <2>; - compatible = "eth,ariane-bare-soc", "simple-bus"; - ranges; - - PLIC0: interrupt-controller@c000000 { - #address-cells = <0>; - #interrupt-cells = <1>; - compatible = "riscv,plic0"; - interrupt-controller; - interrupts-extended = <&CPU0_intc 11 &CPU0_intc 9>; - reg = <0x0 0xc000000 0x0 0x4000000>; - riscv,max-priority = <7>; - riscv,ndev = <30>; - }; - - uart@10000000 { - compatible = "ns16750"; - reg = <0x0 0x10000000 0x0 0x1000>; - clock-frequency = <50000000>; - current-speed = <115200>; - interrupt-parent = <&PLIC0>; - interrupts = <1>; - reg-shift = <2>; // regs are spaced on 32 bit boundary - reg-io-width = <4>; // only 32-bit access are supported - }; - timer@18000000 { - compatible = "pulp,apb_timer"; - interrupts = <0x00000004 0x00000005 0x00000006 0x00000007>; - reg = <0x00000000 0x18000000 0x00000000 0x00001000>; - interrupt-parent = <&PLIC0>; - reg-names = "control"; - }; - spi@20000000 { - compatible = "xlnx,xps-spi-2.00.b", "xlnx,xps-spi-2.00.a"; - #address-cells = <1>; - #size-cells = <0>; - interrupt-parent = <&PLIC0>; - interrupts = < 2 2 >; - reg = < 0x0 0x20000000 0x0 0x1000 >; - xlnx,family = "kintex7"; - xlnx,fifo-exist = <0x1>; - xlnx,num-ss-bits = <0x1>; - xlnx,num-transfer-bits = <0x8>; - xlnx,sck-ratio = <0x4>; - - mmc@0 { - compatible = "mmc-spi-slot"; - reg = <0>; - spi-max-frequency = <12500000>; - voltage-ranges = <3300 3300>; - disable-wp; - }; - - // mmc-slot@0 { - // compatible = "fsl,mpc8323rdb-mmc-slot", "mmc-spi-slot"; - // reg = <0>; //Chip select 0 - // spi-max-frequency = <12500000>; - // voltage-ranges = <3300 3300>; - // //interrupts = < 2 2 >; - // //interrupt-parent = <&PLIC0>; - // }; - }; - eth: lowrisc-eth@30000000 { - compatible = "lowrisc-eth"; - device_type = "network"; - interrupt-parent = <&PLIC0>; - interrupts = <3 0>; - local-mac-address = [00 18 3e 02 e3 7f]; // This needs to change if more than one GenesysII on a VLAN - reg = <0x0 0x30000000 0x0 0x8000>; - }; - xlnx_gpio: gpio@40000000 { - #gpio-cells = <2>; - compatible = "xlnx,xps-gpio-1.00.a"; - gpio-controller ; - reg = <0x0 0x40000000 0x0 0x10000 >; - xlnx,all-inputs = <0x0>; - xlnx,all-inputs-2 = <0x0>; - xlnx,dout-default = <0x0>; - xlnx,dout-default-2 = <0x0>; - xlnx,gpio-width = <0x8>; - xlnx,gpio2-width = <0x8>; - xlnx,interrupt-present = <0x0>; - xlnx,is-dual = <0x1>; - xlnx,tri-default = <0xffffffff>; - xlnx,tri-default-2 = <0xffffffff>; - }; - riscv_iommu: iommu@50010000 { - compatible = "riscv,iommu"; - reg = <0x0 0x50010000 0x0 0x00001000>; - interrupts = <8 9 10>; - interrupt-names = "cmdq", "fltq", "hpm"; - interrupt-parent = <&PLIC0>; - #iommu-cells = <1>; - }; - - idma0: master@50000000{ - compatible = "pulp,idma"; - reg = <0x0 0x50000000 0x0 0x00001000>; - // interrupts = <15>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - iommus = <&riscv_iommu 1>; - }; - - idma1: master@50001000{ - compatible = "pulp,idma"; - reg = <0x0 0x50001000 0x0 0x00001000>; - // interrupts = <13>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - iommus = <&riscv_iommu 2>; - }; - - idma2: master@50002000{ - compatible = "pulp,idma"; - reg = <0x0 0x50002000 0x0 0x00001000>; - // interrupts = <11>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - iommus = <&riscv_iommu 3>; - }; - - idma3: master@50003000{ - compatible = "pulp,idma"; - reg = <0x0 0x50003000 0x0 0x00001000>; - // interrupts = <9>; - // interrupt-names = "wr"; - // interrupt-parent = <&PLIC0>; - iommus = <&riscv_iommu 4>; - }; - }; -}; diff --git a/linux b/linux deleted file mode 160000 index 87c6f20..0000000 --- a/linux +++ /dev/null @@ -1 +0,0 @@ -Subproject commit 87c6f20d0ab80b2c3f4a0780303263d37e585e87 diff --git a/lloader/Makefile b/lloader/Makefile deleted file mode 100644 index e2f427c..0000000 --- a/lloader/Makefile +++ /dev/null @@ -1,30 +0,0 @@ - -ifeq ($(and $(IMAGE), $(DTB), $(TARGET), $(ARCH)),) -ifneq ($(MAKECMDGOALS), clean) - $(error Linux image (IMAGE) and/or device tree (DTB) and/or target name \ - (TARGET) and/or architecture (ARCH) not specified) -endif -endif - -ARCH ?=rv64 - -ifeq ($(ARCH), rv64) -CROSS_COMPILE ?=riscv64-unknown-elf- -OPTIONS=-ffreestanding -nostartfiles -static -march=rv64imafdc -mcmodel=medany -mabi=lp64 -g3 -O3 -else -$(error unkown architecture $(ARCH)) -endif - -all: $(TARGET).bin - -clean: - -rm *.elf *.bin - -.PHONY: all clean - -$(TARGET).bin: $(TARGET).elf - $(CROSS_COMPILE)objcopy -S -O binary $(TARGET).elf $(TARGET).bin - -$(TARGET).elf: $(ARCH).S $(IMAGE) $(DTB) loader_$(ARCH).ld - $(CROSS_COMPILE)gcc -Wl,-build-id=none -nostdlib -T loader_$(ARCH).ld\ - -o $(TARGET).elf $(OPTIONS) $(ARCH).S -I. -D IMAGE=$(IMAGE) -D DTB=$(DTB) diff --git a/lloader/loader_rv64.ld b/lloader/loader_rv64.ld deleted file mode 100644 index 4f26dd9..0000000 --- a/lloader/loader_rv64.ld +++ /dev/null @@ -1,20 +0,0 @@ -ENTRY(_start) - -SECTIONS -{ - .nloader : { - KEEP(*(.nloader)) - } - - .linux : ALIGN(0x200000) { - __linux_start = .; - KEEP(*(.linux)) - __linux_end = .; - } - - .dtb : ALIGN(0x200000) { - __dtb_start = ABSOLUTE(.); - KEEP(*(.dtb)) - __dtb_end = .; - } -} diff --git a/lloader/rv64.S b/lloader/rv64.S deleted file mode 100644 index 69fec40..0000000 --- a/lloader/rv64.S +++ /dev/null @@ -1,22 +0,0 @@ -#define STRINGIFY2(X) #X -#define STRINGIFY(X) STRINGIFY2(X) - -.section .nloader, "a" -.global _start -_start: - - /* boot protocol */ - /* We are expecting hartid in a0 */ - la a1, __dtb_start - - /* jump to linux */ - la t0, __linux_start - jalr t0 - j . - -.section .linux, "a" - .incbin STRINGIFY(IMAGE) - -.section .dtb, "a" - .incbin STRINGIFY(DTB) -