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m68kfpu.c
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#include <math.h>
#include <stdio.h>
#include <stdarg.h>
extern void exit(int);
static void fatalerror(char *format, ...) {
va_list ap;
va_start(ap,format);
fprintf(stderr,format,ap);
va_end(ap);
exit(1);
}
#define FPCC_N 0x08000000
#define FPCC_Z 0x04000000
#define FPCC_I 0x02000000
#define FPCC_NAN 0x01000000
#define DOUBLE_INFINITY (unsigned long long)(0x7ff0000000000000)
#define DOUBLE_EXPONENT (unsigned long long)(0x7ff0000000000000)
#define DOUBLE_MANTISSA (unsigned long long)(0x000fffffffffffff)
extern flag floatx80_is_nan( floatx80 a );
// masks for packed dwords, positive k-factor
static uint32 pkmask2[18] =
{
0xffffffff, 0, 0xf0000000, 0xff000000, 0xfff00000, 0xffff0000,
0xfffff000, 0xffffff00, 0xfffffff0, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
0xffffffff, 0xffffffff, 0xffffffff
};
static uint32 pkmask3[18] =
{
0xffffffff, 0, 0, 0, 0, 0, 0, 0, 0, 0,
0xf0000000, 0xff000000, 0xfff00000, 0xffff0000,
0xfffff000, 0xffffff00, 0xfffffff0, 0xffffffff,
};
static inline double fx80_to_double(floatx80 fx)
{
uint64 d;
double *foo;
foo = (double *)&d;
d = floatx80_to_float64(fx);
return *foo;
}
static inline floatx80 double_to_fx80(double in)
{
uint64 *d;
d = (uint64 *)∈
return float64_to_floatx80(*d);
}
static inline floatx80 load_extended_float80(uint32 ea)
{
uint32 d1,d2;
uint16 d3;
floatx80 fp;
d3 = m68ki_read_16(ea);
d1 = m68ki_read_32(ea+4);
d2 = m68ki_read_32(ea+8);
fp.high = d3;
fp.low = ((uint64)d1<<32) | (d2 & 0xffffffff);
return fp;
}
static inline void store_extended_float80(uint32 ea, floatx80 fpr)
{
m68ki_write_16(ea+0, fpr.high);
m68ki_write_16(ea+2, 0);
m68ki_write_32(ea+4, (fpr.low>>32)&0xffffffff);
m68ki_write_32(ea+8, fpr.low&0xffffffff);
}
static inline floatx80 load_pack_float80(uint32 ea)
{
uint32 dw1, dw2, dw3;
floatx80 result;
double tmp;
char str[128], *ch;
dw1 = m68ki_read_32(ea);
dw2 = m68ki_read_32(ea+4);
dw3 = m68ki_read_32(ea+8);
ch = &str[0];
if (dw1 & 0x80000000) // mantissa sign
{
*ch++ = '-';
}
*ch++ = (char)((dw1 & 0xf) + '0');
*ch++ = '.';
*ch++ = (char)(((dw2 >> 28) & 0xf) + '0');
*ch++ = (char)(((dw2 >> 24) & 0xf) + '0');
*ch++ = (char)(((dw2 >> 20) & 0xf) + '0');
*ch++ = (char)(((dw2 >> 16) & 0xf) + '0');
*ch++ = (char)(((dw2 >> 12) & 0xf) + '0');
*ch++ = (char)(((dw2 >> 8) & 0xf) + '0');
*ch++ = (char)(((dw2 >> 4) & 0xf) + '0');
*ch++ = (char)(((dw2 >> 0) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 28) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 24) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 20) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 16) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 12) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 8) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 4) & 0xf) + '0');
*ch++ = (char)(((dw3 >> 0) & 0xf) + '0');
*ch++ = 'E';
if (dw1 & 0x40000000) // exponent sign
{
*ch++ = '-';
}
*ch++ = (char)(((dw1 >> 24) & 0xf) + '0');
*ch++ = (char)(((dw1 >> 20) & 0xf) + '0');
*ch++ = (char)(((dw1 >> 16) & 0xf) + '0');
*ch = '\0';
sscanf(str, "%le", &tmp);
result = double_to_fx80(tmp);
return result;
}
static inline void store_pack_float80(uint32 ea, int k, floatx80 fpr)
{
uint32 dw1, dw2, dw3;
char str[128], *ch;
int i, j, exp;
dw1 = dw2 = dw3 = 0;
ch = &str[0];
sprintf(str, "%.16e", fx80_to_double(fpr));
if (*ch == '-')
{
ch++;
dw1 = 0x80000000;
}
if (*ch == '+')
{
ch++;
}
dw1 |= (*ch++ - '0');
if (*ch == '.')
{
ch++;
}
// handle negative k-factor here
if ((k <= 0) && (k >= -13))
{
exp = 0;
for (i = 0; i < 3; i++)
{
if (ch[18+i] >= '0' && ch[18+i] <= '9')
{
exp = (exp << 4) | (ch[18+i] - '0');
}
}
if (ch[17] == '-')
{
exp = -exp;
}
k = -k;
// last digit is (k + exponent - 1)
k += (exp - 1);
// round up the last significant mantissa digit
if (ch[k+1] >= '5')
{
ch[k]++;
}
// zero out the rest of the mantissa digits
for (j = (k+1); j < 16; j++)
{
ch[j] = '0';
}
// now zero out K to avoid tripping the positive K detection below
k = 0;
}
// crack 8 digits of the mantissa
for (i = 0; i < 8; i++)
{
dw2 <<= 4;
if (*ch >= '0' && *ch <= '9')
{
dw2 |= *ch++ - '0';
}
}
// next 8 digits of the mantissa
for (i = 0; i < 8; i++)
{
dw3 <<= 4;
if (*ch >= '0' && *ch <= '9')
dw3 |= *ch++ - '0';
}
// handle masking if k is positive
if (k >= 1)
{
if (k <= 17)
{
dw2 &= pkmask2[k];
dw3 &= pkmask3[k];
}
else
{
dw2 &= pkmask2[17];
dw3 &= pkmask3[17];
// m68ki_cpu.fpcr |= (need to set OPERR bit)
}
}
// finally, crack the exponent
if (*ch == 'e' || *ch == 'E')
{
ch++;
if (*ch == '-')
{
ch++;
dw1 |= 0x40000000;
}
if (*ch == '+')
{
ch++;
}
j = 0;
for (i = 0; i < 3; i++)
{
if (*ch >= '0' && *ch <= '9')
{
j = (j << 4) | (*ch++ - '0');
}
}
dw1 |= (j << 16);
}
m68ki_write_32(ea, dw1);
m68ki_write_32(ea+4, dw2);
m68ki_write_32(ea+8, dw3);
}
static inline void SET_CONDITION_CODES(floatx80 reg)
{
REG_FPSR &= ~(FPCC_N|FPCC_Z|FPCC_I|FPCC_NAN);
// sign flag
if (reg.high & 0x8000)
{
REG_FPSR |= FPCC_N;
}
// zero flag
if (((reg.high & 0x7fff) == 0) && ((reg.low<<1) == 0))
{
REG_FPSR |= FPCC_Z;
}
// infinity flag
if (((reg.high & 0x7fff) == 0x7fff) && ((reg.low<<1) == 0))
{
REG_FPSR |= FPCC_I;
}
// NaN flag
if (floatx80_is_nan(reg))
{
REG_FPSR |= FPCC_NAN;
}
}
static inline int TEST_CONDITION(int condition)
{
int n = (REG_FPSR & FPCC_N) != 0;
int z = (REG_FPSR & FPCC_Z) != 0;
int nan = (REG_FPSR & FPCC_NAN) != 0;
int r = 0;
switch (condition)
{
case 0x10:
case 0x00: return 0; // False
case 0x11:
case 0x01: return (z); // Equal
case 0x12:
case 0x02: return (!(nan || z || n)); // Greater Than
case 0x13:
case 0x03: return (z || !(nan || n)); // Greater or Equal
case 0x14:
case 0x04: return (n && !(nan || z)); // Less Than
case 0x15:
case 0x05: return (z || (n && !nan)); // Less Than or Equal
case 0x16:
case 0x06: return !nan && !z;
case 0x17:
case 0x07: return !nan;
case 0x18:
case 0x08: return nan;
case 0x19:
case 0x09: return nan || z;
case 0x1a:
case 0x0a: return (nan || !(n || z)); // Not Less Than or Equal
case 0x1b:
case 0x0b: return (nan || z || !n); // Not Less Than
case 0x1c:
case 0x0c: return (nan || (n && !z)); // Not Greater or Equal Than
case 0x1d:
case 0x0d: return (nan || z || n); // Not Greater Than
case 0x1e:
case 0x0e: return (!z); // Not Equal
case 0x1f:
case 0x0f: return 1; // True
default: fatalerror("M68kFPU: test_condition: unhandled condition %02X\n", condition);
}
return r;
}
static uint8 READ_EA_8(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 0: // Dn
{
return REG_D[reg];
}
case 2: // (An)
{
uint32 ea = REG_A[reg];
return m68ki_read_8(ea);
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_8();
return m68ki_read_8(ea);
}
case 6: // (An) + (Xn) + d8
{
uint32 ea = EA_AY_IX_8();
return m68ki_read_8(ea);
}
case 7:
{
switch (reg)
{
case 0: // (xxx).W
{
uint32 ea = (uint32)OPER_I_16();
return m68ki_read_8(ea);
}
case 1: // (xxx).L
{
uint32 d1 = OPER_I_16();
uint32 d2 = OPER_I_16();
uint32 ea = (d1 << 16) | d2;
return m68ki_read_8(ea);
}
case 4: // #<data>
{
return OPER_I_8();
}
default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: READ_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
return 0;
}
static uint16 READ_EA_16(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 0: // Dn
{
return (uint16)(REG_D[reg]);
}
case 2: // (An)
{
uint32 ea = REG_A[reg];
return m68ki_read_16(ea);
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_16();
return m68ki_read_16(ea);
}
case 6: // (An) + (Xn) + d8
{
uint32 ea = EA_AY_IX_16();
return m68ki_read_16(ea);
}
case 7:
{
switch (reg)
{
case 0: // (xxx).W
{
uint32 ea = (uint32)OPER_I_16();
return m68ki_read_16(ea);
}
case 1: // (xxx).L
{
uint32 d1 = OPER_I_16();
uint32 d2 = OPER_I_16();
uint32 ea = (d1 << 16) | d2;
return m68ki_read_16(ea);
}
case 4: // #<data>
{
return OPER_I_16();
}
default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: READ_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
return 0;
}
static uint32 READ_EA_32(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 0: // Dn
{
return REG_D[reg];
}
case 2: // (An)
{
uint32 ea = REG_A[reg];
return m68ki_read_32(ea);
}
case 3: // (An)+
{
uint32 ea = EA_AY_PI_32();
return m68ki_read_32(ea);
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_32();
return m68ki_read_32(ea);
}
case 6: // (An) + (Xn) + d8
{
uint32 ea = EA_AY_IX_32();
return m68ki_read_32(ea);
}
case 7:
{
switch (reg)
{
case 0: // (xxx).W
{
uint32 ea = (uint32)OPER_I_16();
return m68ki_read_32(ea);
}
case 1: // (xxx).L
{
uint32 d1 = OPER_I_16();
uint32 d2 = OPER_I_16();
uint32 ea = (d1 << 16) | d2;
return m68ki_read_32(ea);
}
case 2: // (d16, PC)
{
uint32 ea = EA_PCDI_32();
return m68ki_read_32(ea);
}
case 4: // #<data>
{
return OPER_I_32();
}
default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: READ_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
return 0;
}
static uint64 READ_EA_64(int ea)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
uint32 h1, h2;
switch (mode)
{
case 2: // (An)
{
uint32 ea = REG_A[reg];
h1 = m68ki_read_32(ea+0);
h2 = m68ki_read_32(ea+4);
return (uint64)(h1) << 32 | (uint64)(h2);
}
case 3: // (An)+
{
uint32 ea = REG_A[reg];
REG_A[reg] += 8;
h1 = m68ki_read_32(ea+0);
h2 = m68ki_read_32(ea+4);
return (uint64)(h1) << 32 | (uint64)(h2);
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_32();
h1 = m68ki_read_32(ea+0);
h2 = m68ki_read_32(ea+4);
return (uint64)(h1) << 32 | (uint64)(h2);
}
case 7:
{
switch (reg)
{
case 4: // #<data>
{
h1 = OPER_I_32();
h2 = OPER_I_32();
return (uint64)(h1) << 32 | (uint64)(h2);
}
case 2: // (d16, PC)
{
uint32 ea = EA_PCDI_32();
h1 = m68ki_read_32(ea+0);
h2 = m68ki_read_32(ea+4);
return (uint64)(h1) << 32 | (uint64)(h2);
}
default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: READ_EA_64: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
return 0;
}
static floatx80 READ_EA_FPE(int ea)
{
floatx80 fpr;
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 2: // (An)
{
uint32 ea = REG_A[reg];
fpr = load_extended_float80(ea);
break;
}
case 3: // (An)+
{
uint32 ea = REG_A[reg];
REG_A[reg] += 12;
fpr = load_extended_float80(ea);
break;
}
case 7: // extended modes
{
switch (reg)
{
case 2: // (d16, PC)
{
uint32 ea = EA_PCDI_32();
fpr = load_extended_float80(ea);
}
break;
case 3: // (d16,PC,Dx.w)
{
uint32 ea = EA_PCIX_32();
fpr = load_extended_float80(ea);
}
break;
default:
fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC);
break;
}
}
break;
default: fatalerror("M68kFPU: READ_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC); break;
}
return fpr;
}
static floatx80 READ_EA_PACK(int ea)
{
floatx80 fpr;
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 2: // (An)
{
uint32 ea = REG_A[reg];
fpr = load_pack_float80(ea);
break;
}
case 3: // (An)+
{
uint32 ea = REG_A[reg];
REG_A[reg] += 12;
fpr = load_pack_float80(ea);
break;
}
case 7: // extended modes
{
switch (reg)
{
case 3: // (d16,PC,Dx.w)
{
uint32 ea = EA_PCIX_32();
fpr = load_pack_float80(ea);
}
break;
default:
fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC);
break;
}
}
break;
default: fatalerror("M68kFPU: READ_EA_PACK: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC); break;
}
return fpr;
}
static void WRITE_EA_8(int ea, uint8 data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 0: // Dn
{
REG_D[reg] = data;
break;
}
case 2: // (An)
{
uint32 ea = REG_A[reg];
m68ki_write_8(ea, data);
break;
}
case 3: // (An)+
{
uint32 ea = EA_AY_PI_8();
m68ki_write_8(ea, data);
break;
}
case 4: // -(An)
{
uint32 ea = EA_AY_PD_8();
m68ki_write_8(ea, data);
break;
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_8();
m68ki_write_8(ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
uint32 ea = EA_AY_IX_8();
m68ki_write_8(ea, data);
break;
}
case 7:
{
switch (reg)
{
case 1: // (xxx).B
{
uint32 d1 = OPER_I_16();
uint32 d2 = OPER_I_16();
uint32 ea = (d1 << 16) | d2;
m68ki_write_8(ea, data);
break;
}
case 2: // (d16, PC)
{
uint32 ea = EA_PCDI_16();
m68ki_write_8(ea, data);
break;
}
default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: WRITE_EA_8: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC);
}
}
static void WRITE_EA_16(int ea, uint16 data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 0: // Dn
{
REG_D[reg] = data;
break;
}
case 2: // (An)
{
uint32 ea = REG_A[reg];
m68ki_write_16(ea, data);
break;
}
case 3: // (An)+
{
uint32 ea = EA_AY_PI_16();
m68ki_write_16(ea, data);
break;
}
case 4: // -(An)
{
uint32 ea = EA_AY_PD_16();
m68ki_write_16(ea, data);
break;
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_16();
m68ki_write_16(ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
uint32 ea = EA_AY_IX_16();
m68ki_write_16(ea, data);
break;
}
case 7:
{
switch (reg)
{
case 1: // (xxx).W
{
uint32 d1 = OPER_I_16();
uint32 d2 = OPER_I_16();
uint32 ea = (d1 << 16) | d2;
m68ki_write_16(ea, data);
break;
}
case 2: // (d16, PC)
{
uint32 ea = EA_PCDI_16();
m68ki_write_16(ea, data);
break;
}
default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: WRITE_EA_16: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC);
}
}
static void WRITE_EA_32(int ea, uint32 data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 0: // Dn
{
REG_D[reg] = data;
break;
}
case 1: // An
{
REG_A[reg] = data;
break;
}
case 2: // (An)
{
uint32 ea = REG_A[reg];
m68ki_write_32(ea, data);
break;
}
case 3: // (An)+
{
uint32 ea = EA_AY_PI_32();
m68ki_write_32(ea, data);
break;
}
case 4: // -(An)
{
uint32 ea = EA_AY_PD_32();
m68ki_write_32(ea, data);
break;
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_32();
m68ki_write_32(ea, data);
break;
}
case 6: // (An) + (Xn) + d8
{
uint32 ea = EA_AY_IX_32();
m68ki_write_32(ea, data);
break;
}
case 7:
{
switch (reg)
{
case 1: // (xxx).L
{
uint32 d1 = OPER_I_16();
uint32 d2 = OPER_I_16();
uint32 ea = (d1 << 16) | d2;
m68ki_write_32(ea, data);
break;
}
case 2: // (d16, PC)
{
uint32 ea = EA_PCDI_32();
m68ki_write_32(ea, data);
break;
}
default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: WRITE_EA_32: unhandled mode %d, reg %d, data %08X at %08X\n", mode, reg, data, REG_PC);
}
}
static void WRITE_EA_64(int ea, uint64 data)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 2: // (An)
{
uint32 ea = REG_A[reg];
m68ki_write_32(ea, (uint32)(data >> 32));
m68ki_write_32(ea+4, (uint32)(data));
break;
}
case 4: // -(An)
{
uint32 ea;
REG_A[reg] -= 8;
ea = REG_A[reg];
m68ki_write_32(ea+0, (uint32)(data >> 32));
m68ki_write_32(ea+4, (uint32)(data));
break;
}
case 5: // (d16, An)
{
uint32 ea = EA_AY_DI_32();
m68ki_write_32(ea+0, (uint32)(data >> 32));
m68ki_write_32(ea+4, (uint32)(data));
break;
}
default: fatalerror("M68kFPU: WRITE_EA_64: unhandled mode %d, reg %d, data %08X%08X at %08X\n", mode, reg, (uint32)(data >> 32), (uint32)(data), REG_PC);
}
}
static void WRITE_EA_FPE(int ea, floatx80 fpr)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 2: // (An)
{
uint32 ea;
ea = REG_A[reg];
store_extended_float80(ea, fpr);
break;
}
case 3: // (An)+
{
uint32 ea;
ea = REG_A[reg];
store_extended_float80(ea, fpr);
REG_A[reg] += 12;
break;
}
case 4: // -(An)
{
uint32 ea;
REG_A[reg] -= 12;
ea = REG_A[reg];
store_extended_float80(ea, fpr);
break;
}
case 7:
{
switch (reg)
{
default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC);
}
break;
}
default: fatalerror("M68kFPU: WRITE_EA_FPE: unhandled mode %d, reg %d, at %08X\n", mode, reg, REG_PC);
}
}
static void WRITE_EA_PACK(int ea, int k, floatx80 fpr)
{
int mode = (ea >> 3) & 0x7;
int reg = (ea & 0x7);
switch (mode)
{
case 2: // (An)
{
uint32 ea;
ea = REG_A[reg];
store_pack_float80(ea, k, fpr);
break;
}