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lines changed
3 files changed +17
-5
lines changed Original file line number Diff line number Diff line change 2
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all : build sim
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- NUM_TESTS := 100
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+ NUM_TESTS := 10000
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TOLERATE_BITS := 3
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- RAND_CONS := 5
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+ RAND_CONS := 61
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FPU_SRC := duv/pfpu32_top.v
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clean :
@@ -26,7 +26,8 @@ vsim_args := \
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+NUM_TESTS=$(NUM_TESTS ) \
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+TOLERATE_BITS=$(TOLERATE_BITS ) \
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+RAND_CONS=$(RAND_CONS ) \
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- -suppress 8604
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+ -suppress 8604 \
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+ -suppress 8630
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ifdef TEST_PRINT
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vsim_args += +TEST_PRINT
Original file line number Diff line number Diff line change @@ -8,10 +8,10 @@ class generator;
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if (! $value$plusargs (" NUM_TESTS=%0d " , NUM_TESTS )) NUM_TESTS = 10 ;
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t = new ();
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- setconstraints ();
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do
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begin
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+ setconstraints ();
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assert (t.randomize ());
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common :: gen2drv.put (t);
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common :: cbfm0.waittilldone ();
@@ -22,7 +22,6 @@ class generator;
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int RAND_CONS = 7 ;
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if ($value$plusargs (" RAND_CONS=%0d " , RAND_CONS ))
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begin
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- $display (" Constraints chosen with RAND_CONS = %d " , RAND_CONS );
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RAND_CONS = RAND_CONS + 1 ;
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end
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t.constraint_mode (0 );
@@ -52,6 +51,16 @@ class generator;
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t.zeroonlyA.constraint_mode (1 );
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t.zeroonlyB.constraint_mode (1 );
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end
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+ 51 : begin
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+ t.infA.constraint_mode (1 );
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+ end
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+ 55 : begin
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+ t.infB.constraint_mode (1 );
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+ end
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+ 60 : begin
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+ t.infA.constraint_mode (1 );
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+ t.infB.constraint_mode (1 );
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+ end
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default : begin
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t.normonlyA.constraint_mode (1 );
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t.normonlyB.constraint_mode (1 );
Original file line number Diff line number Diff line change @@ -15,6 +15,8 @@ class transaction;
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constraint normonlyB { expB != '0 || mantB == 0 ;} ;
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constraint denormonlyB { expB == '0 && mantB != '0 ;} ;
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constraint zeroonlyB { expB == '0 && mantB == '0 ;} ;
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+ constraint infA { expA == '1 && mantA == '0 ;} ;
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+ constraint infB { expB == '1 && mantB == '0 ;} ;
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constraint bothnormdenormAB {} ;
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protected int randcount = 0 ;
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