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hpoussinjasowang
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rtl8139: correctly handle PHY reset
According to datasheet: "[Bit 15 of Basic Mode Control Register] sets the status and control registers of the PHY (register 0062-0074) in a default state. This bit is self-clearing. 1 = software reset; 0 = normal operation." This fixes the netcard detection failure in Minoca OS. Signed-off-by: Hervé Poussineau <[email protected]> Signed-off-by: Jason Wang <[email protected]>
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hw/net/rtl8139.c

Lines changed: 21 additions & 13 deletions
Original file line numberDiff line numberDiff line change
@@ -1205,6 +1205,20 @@ static void rtl8139_reset_rxring(RTL8139State *s, uint32_t bufferSize)
12051205
s->RxBufAddr = 0;
12061206
}
12071207

1208+
static void rtl8139_reset_phy(RTL8139State *s)
1209+
{
1210+
s->BasicModeStatus = 0x7809;
1211+
s->BasicModeStatus |= 0x0020; /* autonegotiation completed */
1212+
/* preserve link state */
1213+
s->BasicModeStatus |= qemu_get_queue(s->nic)->link_down ? 0 : 0x04;
1214+
1215+
s->NWayAdvert = 0x05e1; /* all modes, full duplex */
1216+
s->NWayLPAR = 0x05e1; /* all modes, full duplex */
1217+
s->NWayExpansion = 0x0001; /* autonegotiation supported */
1218+
1219+
s->CSCR = CSCR_F_LINK_100 | CSCR_HEART_BIT | CSCR_LD;
1220+
}
1221+
12081222
static void rtl8139_reset(DeviceState *d)
12091223
{
12101224
RTL8139State *s = RTL8139(d);
@@ -1256,25 +1270,14 @@ static void rtl8139_reset(DeviceState *d)
12561270
s->Config3 = 0x1; /* fast back-to-back compatible */
12571271
s->Config5 = 0x0;
12581272

1259-
s->CSCR = CSCR_F_LINK_100 | CSCR_HEART_BIT | CSCR_LD;
1260-
12611273
s->CpCmd = 0x0; /* reset C+ mode */
12621274
s->cplus_enabled = 0;
12631275

1264-
12651276
// s->BasicModeCtrl = 0x3100; // 100Mbps, full duplex, autonegotiation
12661277
// s->BasicModeCtrl = 0x2100; // 100Mbps, full duplex
12671278
s->BasicModeCtrl = 0x1000; // autonegotiation
12681279

1269-
s->BasicModeStatus = 0x7809;
1270-
//s->BasicModeStatus |= 0x0040; /* UTP medium */
1271-
s->BasicModeStatus |= 0x0020; /* autonegotiation completed */
1272-
/* preserve link state */
1273-
s->BasicModeStatus |= qemu_get_queue(s->nic)->link_down ? 0 : 0x04;
1274-
1275-
s->NWayAdvert = 0x05e1; /* all modes, full duplex */
1276-
s->NWayLPAR = 0x05e1; /* all modes, full duplex */
1277-
s->NWayExpansion = 0x0001; /* autonegotiation supported */
1280+
rtl8139_reset_phy(s);
12781281

12791282
/* also reset timer and disable timer interrupt */
12801283
s->TCTR = 0;
@@ -1469,7 +1472,7 @@ static void rtl8139_BasicModeCtrl_write(RTL8139State *s, uint32_t val)
14691472
DPRINTF("BasicModeCtrl register write(w) val=0x%04x\n", val);
14701473

14711474
/* mask unwritable bits */
1472-
uint32_t mask = 0x4cff;
1475+
uint32_t mask = 0xccff;
14731476

14741477
if (1 || !rtl8139_config_writable(s))
14751478
{
@@ -1479,6 +1482,11 @@ static void rtl8139_BasicModeCtrl_write(RTL8139State *s, uint32_t val)
14791482
mask |= 0x0100;
14801483
}
14811484

1485+
if (val & 0x8000) {
1486+
/* Reset PHY */
1487+
rtl8139_reset_phy(s);
1488+
}
1489+
14821490
val = SET_MASKED(val, mask, s->BasicModeCtrl);
14831491

14841492
s->BasicModeCtrl = val;

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