Bugs

Using "event driven" and "driver controlled" pipelining is out of spec of OpenCL but seems to be working for Amd and Intel GPUs for now. When they are enabled(by adding a "true" boolean value as parameter to compute()), the API slices a region into N parts and reads/writes only that parts with clEnqueueRead/WriteBuffer commands per (sliced and offsetted)kernel. Multiple kernels read or write different regions of a buffer at the same time and this is undefined behavior.

Driver - event pipelining page:

https://github.com/tugrul512bit/Cekirdekler/wiki/Pipelining

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