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stephentyronestephentyrone
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SIMD test IR not ASM (swiftlang#82078)
1 parent 41b0b28 commit b67050b

5 files changed

+127
-211
lines changed

‎test/stdlib/SIMDFloatComparisons.swift.gyb

Lines changed: 81 additions & 48 deletions
Original file line numberDiff line numberDiff line change
@@ -11,96 +11,129 @@
1111
//===----------------------------------------------------------------------===//
1212
// RUN: %empty-directory(%t)
1313
// RUN: %gyb %s -o %t/SIMDFloatComparisons.swift
14-
// RUN: %target-swift-frontend -primary-file %t/SIMDFloatComparisons.swift -S | %FileCheck %t/SIMDFloatComparisons.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKOnone-%target-cpu
15-
// RUN: %target-swift-frontend -primary-file %t/SIMDFloatComparisons.swift -S -O | %FileCheck %t/SIMDFloatComparisons.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKO-%target-cpu
14+
// RUN: %target-swift-frontend -primary-file %t/SIMDFloatComparisons.swift -emit-ir | %FileCheck %t/SIMDFloatComparisons.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu
1615

1716
import Swift
1817

19-
%for bits in [32,64]:
20-
% scalar = {32:'Float',64:'Double'}[bits]
18+
%for bits in [16,32,64]:
19+
% scalar = {16:'Float16',32:'Float',64:'Double'}[bits]
20+
% llvm = {16:'half',32:'float',64:'double'}[bits]
2121
% for totalBits in [64,128]:
22+
% if bits == 16 or totalBits == 64:
23+
% arch = "-arm64"
24+
% else:
25+
% arch = ""
26+
% end
2227
% n = totalBits // bits
2328
% if n != 1:
2429
% neonSuffix = str(n) + {8:'b',16:'h',32:'s',64:'d'}[bits]
30+
% if bits == 16:
31+
#if arch(arm64)
32+
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
33+
% end
2534
func compare_eq${n}x${bits}(
2635
_ a: SIMD${n}<${scalar}>, _ b: SIMD${n}<${scalar}>
2736
) -> SIMDMask<SIMD${n}<Int${bits}>> {
2837
a .== b
2938
}
30-
// CHECK: compare_eq${n}x${bits}{{[[:alnum:]_]+}}:
31-
// CHECK-x86_64: cmpeqp${'s' if bits == 32 else 'd'}
32-
// CHECK-x86_64: ret
33-
// CHECKO-arm64-NEXT: fcmeq.${neonSuffix} v0, v0, v1
34-
// CHECKO-arm64-NEXT: ret
35-
// CHECKOnone-arm64: fcmeq.${neonSuffix}
36-
// CHECKOnone-arm64: ret
39+
% if bits == 16:
40+
#endif
41+
% end
42+
// CHECK${arch}: compare_eq${n}x${bits}{{.*}} {
43+
// CHECK${arch}: entry:
44+
// CHECK${arch}: [[TMP:%[0-9]+]] = fcmp oeq <${n} x ${llvm}> %0, %1
45+
// CHECK${arch}-NEXT: [[RES:%[0-9]+]] = sext <${n} x i1> [[TMP]] to <${n} x i${bits}>
46+
// CHECK${arch}-NEXT: ret <${n} x i${bits}> [[RES]]
3747

48+
% if bits == 16:
49+
#if arch(arm64)
50+
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
51+
% end
3852
func compare_ne${n}x${bits}(
3953
_ a: SIMD${n}<${scalar}>, _ b: SIMD${n}<${scalar}>
4054
) -> SIMDMask<SIMD${n}<Int${bits}>> {
4155
a .!= b
4256
}
43-
// CHECK: compare_ne${n}x${bits}{{[[:alnum:]_]+}}:
44-
// CHECK-x86_64: cmpneqp${'s' if bits == 32 else 'd'}
45-
// CHECK-x86_64: ret
46-
// CHECKO-arm64-NEXT: fcmeq.${neonSuffix} [[TMP:v[0-9]+]], v0, v1
47-
// CHECKO-arm64-NEXT: mvn.${totalBits//8}b v0, [[TMP]]
48-
// CHECKO-arm64-NEXT: ret
49-
// CHECKOnone-arm64: fcmeq.${neonSuffix}
50-
// CHECKOnone-arm64: mvn.${totalBits//8}b
51-
// CHECKOnone-arm64: ret
57+
% if bits == 16:
58+
#endif
59+
% end
60+
// CHECK${arch}: compare_ne${n}x${bits}{{.*}} {
61+
// CHECK${arch}: entry:
62+
// CHECK${arch}: [[TMP:%[0-9]+]] = fcmp une <${n} x ${llvm}> %0, %1
63+
// CHECK${arch}-NEXT: [[RES:%[0-9]+]] = sext <${n} x i1> [[TMP]] to <${n} x i${bits}>
64+
// CHECK${arch}-NEXT: ret <${n} x i${bits}> [[RES]]
5265

66+
% if bits == 16:
67+
#if arch(arm64)
68+
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
69+
% end
5370
func compare_lt${n}x${bits}(
5471
_ a: SIMD${n}<${scalar}>, _ b: SIMD${n}<${scalar}>
5572
) -> SIMDMask<SIMD${n}<Int${bits}>> {
5673
a .< b
5774
}
58-
// CHECK: compare_lt${n}x${bits}{{[[:alnum:]_]+}}:
59-
// CHECK-x86_64: cmpltp${'s' if bits == 32 else 'd'}
60-
// CHECK-x86_64: ret
61-
// CHECKO-arm64-NEXT: fcmgt.${neonSuffix} v0, v1, v0
62-
// CHECKO-arm64-NEXT: ret
63-
// CHECKOnone-arm64: fcmgt.${neonSuffix}
64-
// CHECKOnone-arm64: ret
75+
% if bits == 16:
76+
#endif
77+
% end
78+
// CHECK${arch}: compare_lt${n}x${bits}{{.*}} {
79+
// CHECK${arch}: entry:
80+
// CHECK${arch}: [[TMP:%[0-9]+]] = fcmp olt <${n} x ${llvm}> %0, %1
81+
// CHECK${arch}-NEXT: [[RES:%[0-9]+]] = sext <${n} x i1> [[TMP]] to <${n} x i${bits}>
82+
// CHECK${arch}-NEXT: ret <${n} x i${bits}> [[RES]]
6583

84+
% if bits == 16:
85+
#if arch(arm64)
86+
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
87+
% end
6688
func compare_le${n}x${bits}(
6789
_ a: SIMD${n}<${scalar}>, _ b: SIMD${n}<${scalar}>
6890
) -> SIMDMask<SIMD${n}<Int${bits}>> {
6991
a .<= b
7092
}
71-
// CHECK: compare_le${n}x${bits}{{[[:alnum:]_]+}}:
72-
// CHECK-x86_64: cmplep${'s' if bits == 32 else 'd'}
73-
// CHECK-x86_64: ret
74-
// CHECKO-arm64-NEXT: fcmge.${neonSuffix} v0, v1, v0
75-
// CHECKO-arm64-NEXT: ret
76-
// CHECKOnone-arm64: fcmge.${neonSuffix}
77-
// CHECKOnone-arm64: ret
93+
% if bits == 16:
94+
#endif
95+
% end
96+
// CHECK${arch}: compare_le${n}x${bits}{{.*}} {
97+
// CHECK${arch}: entry:
98+
// CHECK${arch}: [[TMP:%[0-9]+]] = fcmp ole <${n} x ${llvm}> %0, %1
99+
// CHECK${arch}-NEXT: [[RES:%[0-9]+]] = sext <${n} x i1> [[TMP]] to <${n} x i${bits}>
100+
// CHECK${arch}-NEXT: ret <${n} x i${bits}> [[RES]]
78101

102+
% if bits == 16:
103+
#if arch(arm64)
104+
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
105+
% end
79106
func compare_ge${n}x${bits}(
80107
_ a: SIMD${n}<${scalar}>, _ b: SIMD${n}<${scalar}>
81108
) -> SIMDMask<SIMD${n}<Int${bits}>> {
82109
a .>= b
83110
}
84-
// CHECK: compare_ge${n}x${bits}{{[[:alnum:]_]+}}:
85-
// CHECK-x86_64: cmplep${'s' if bits == 32 else 'd'}
86-
// CHECK-x86_64: ret
87-
// CHECKO-arm64-NEXT: fcmge.${neonSuffix} v0, v0, v1
88-
// CHECKO-arm64-NEXT: ret
89-
// CHECKOnone-arm64: fcmge.${neonSuffix}
90-
// CHECKOnone-arm64: ret
111+
% if bits == 16:
112+
#endif
113+
% end
114+
// CHECK${arch}: compare_ge${n}x${bits}{{.*}} {
115+
// CHECK${arch}: entry:
116+
// CHECK${arch}: [[TMP:%[0-9]+]] = fcmp oge <${n} x ${llvm}> %0, %1
117+
// CHECK${arch}-NEXT: [[RES:%[0-9]+]] = sext <${n} x i1> [[TMP]] to <${n} x i${bits}>
118+
// CHECK${arch}-NEXT: ret <${n} x i${bits}> [[RES]]
91119

120+
% if bits == 16:
121+
#if arch(arm64)
122+
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
123+
% end
92124
func compare_gt${n}x${bits}(
93125
_ a: SIMD${n}<${scalar}>, _ b: SIMD${n}<${scalar}>
94126
) -> SIMDMask<SIMD${n}<Int${bits}>> {
95127
a .> b
96128
}
97-
// CHECK: compare_gt${n}x${bits}{{[[:alnum:]_]+}}:
98-
// CHECK-x86_64: cmpltp${'s' if bits == 32 else 'd'}
99-
// CHECK-x86_64: ret
100-
// CHECKO-arm64-NEXT: fcmgt.${neonSuffix} v0, v0, v1
101-
// CHECKO-arm64-NEXT: ret
102-
// CHECKOnone-arm64: fcmgt.${neonSuffix}
103-
// CHECKOnone-arm64: ret
129+
% if bits == 16:
130+
#endif
131+
% end
132+
// CHECK${arch}: compare_gt${n}x${bits}{{.*}} {
133+
// CHECK${arch}: entry:
134+
// CHECK${arch}: [[TMP:%[0-9]+]] = fcmp ogt <${n} x ${llvm}> %0, %1
135+
// CHECK${arch}-NEXT: [[RES:%[0-9]+]] = sext <${n} x i1> [[TMP]] to <${n} x i${bits}>
136+
// CHECK${arch}-NEXT: ret <${n} x i${bits}> [[RES]]
104137

105138
% end
106139
% end

‎test/stdlib/SIMDFloatInitializers.swift.gyb

Lines changed: 16 additions & 44 deletions
Original file line numberDiff line numberDiff line change
@@ -11,13 +11,18 @@
1111
//===----------------------------------------------------------------------===//
1212
// RUN: %empty-directory(%t)
1313
// RUN: %gyb %s -o %t/SIMDFloatInitializers.swift
14-
// RUN: %target-swift-frontend -primary-file %t/SIMDFloatInitializers.swift -S | %FileCheck %t/SIMDFloatInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKOnone-%target-cpu
15-
// RUN: %target-swift-frontend -primary-file %t/SIMDFloatInitializers.swift -S -O | %FileCheck %t/SIMDFloatInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKO-%target-cpu
14+
// RUN: %target-swift-frontend -primary-file %t/SIMDFloatInitializers.swift -emit-ir | %FileCheck %t/SIMDFloatInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu
1615

1716
import Swift
1817

1918
%for bits in [16,32,64]:
19+
% if bits == 16:
20+
% arch = "-arm64"
21+
% else:
22+
% arch = ""
23+
% end
2024
% scalar = {16:'Float16',32:'Float',64:'Double'}[bits]
25+
% llvm = {16:'half',32:'float',64:'double'}[bits]
2126
% for totalBits in [64,128]:
2227
% n = totalBits // bits
2328
% if n != 1:
@@ -31,51 +36,18 @@ func repeating${n}x${bits}(_ scalar: ${scalar}) -> SIMD${n}<${scalar}> {
3136
}
3237
% if bits == 16:
3338
#endif
34-
// CHECK-arm64: repeating${n}x${bits}{{[[:alnum:]_]+}}:
39+
% end
40+
41+
// CHECK${arch}: repeating${n}x${bits}{{.*}} {
42+
// CHECK${arch}: entry:
43+
// CHECK${arch}: [[TMP:%[0-9]+]] = insertelement <${n} x ${llvm}> {{.*}} ${llvm} %0, i32 0
44+
// CHECK${arch}-NEXT: [[REP:%[0-9]+]] = shufflevector <${n} x ${llvm}> [[TMP]], <${n} x ${llvm}> {{.*}}, <${n} x i32> zeroinitializer
45+
% if totalBits == 64:
46+
// CHECK-arm64-NEXT: ret <${n} x ${llvm}> [[REP]]
3547
% else:
36-
// CHECK: repeating${n}x${bits}{{[[:alnum:]_]+}}:
48+
// CHECK${arch}-NEXT: ret <${n} x ${llvm}> [[REP]]
3749
% end
38-
// CHECKO-arm64-NEXT: dup.${neonSuffix} v0, v0[0]
39-
// CHECKO-arm64-NEXT: ret
40-
// CHECKOnone-arm64: dup.${neonSuffix}
41-
// CHECKOnone-arm64: ret
4250

4351
% end
4452
% end
4553
%end
46-
47-
#if arch(arm64)
48-
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
49-
func concat4x16(_ a: SIMD4<Float16>, _ b: SIMD4<Float16>) -> SIMD8<Float16> {
50-
SIMD8(lowHalf: a, highHalf: b)
51-
}
52-
// CHECK-arm64: s21SIMDFloatInitializers10concat4x16ys5SIMD8Vys7Float16VGs5SIMD4VyAFG_AJtF:
53-
// CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
54-
// CHECKO-arm64-NEXT: ret
55-
56-
@available(macOS 11.0, iOS 14.0, tvOS 14.0, watchOS 7.0, *)
57-
func concat8x16(_ a: SIMD8<Float16>, _ b: SIMD8<Float16>) -> SIMD16<Float16> {
58-
SIMD16(lowHalf: a, highHalf: b)
59-
}
60-
// CHECK-arm64: s21SIMDFloatInitializers10concat8x16ys6SIMD16Vys7Float16VGs5SIMD8VyAFG_AJtF:
61-
// CHECKO-arm64-NEXT: ret
62-
#endif
63-
64-
func concat2x32(_ a: SIMD2<Float>, _ b: SIMD2<Float>) -> SIMD4<Float> {
65-
SIMD4(lowHalf: a, highHalf: b)
66-
}
67-
// CHECK: s21SIMDFloatInitializers10concat2x32ys5SIMD4VySfGs5SIMD2VySfG_AHtF:
68-
// CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
69-
// CHECKO-arm64-NEXT: ret
70-
71-
func concat4x32(_ a: SIMD4<Float>, _ b: SIMD4<Float>) -> SIMD8<Float> {
72-
SIMD8(lowHalf: a, highHalf: b)
73-
}
74-
// CHECK: s21SIMDFloatInitializers10concat4x32ys5SIMD8VySfGs5SIMD4VySfG_AHtF:
75-
// CHECKO-arm64-NEXT: ret
76-
77-
func concat2x64(_ a: SIMD2<Double>, _ b: SIMD2<Double>) -> SIMD4<Double> {
78-
SIMD4(lowHalf: a, highHalf: b)
79-
}
80-
// CHECK: s21SIMDFloatInitializers10concat2x64ys5SIMD4VySdGs5SIMD2VySdG_AHtF:
81-
// CHECKO-arm64-NEXT: ret

‎test/stdlib/SIMDMaskInitializers.swift.gyb

Lines changed: 10 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,7 @@
1111
//===----------------------------------------------------------------------===//
1212
// RUN: %empty-directory(%t)
1313
// RUN: %gyb %s -o %t/SIMDMaskInitializers.swift
14-
// RUN: %target-swift-frontend -primary-file %t/SIMDMaskInitializers.swift -S | %FileCheck %t/SIMDMaskInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKOnone-%target-cpu
15-
// RUN: %target-swift-frontend -primary-file %t/SIMDMaskInitializers.swift -S -O | %FileCheck %t/SIMDMaskInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKO-%target-cpu
14+
// RUN: %target-swift-frontend -primary-file %t/SIMDMaskInitializers.swift -emit-ir | %FileCheck %t/SIMDMaskInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu
1615

1716
import Swift
1817

@@ -24,12 +23,15 @@ import Swift
2423
func repeating${n}_mask${bits}(_ scalar: Bool) -> SIMDMask<SIMD${n}<Int${bits}>> {
2524
SIMDMask(repeating: scalar)
2625
}
27-
// CHECK: repeating${n}_mask${bits}{{[[:alnum:]_]+}}:
28-
// CHECKO-arm64-NEXT: sbfx [[REG:[wx][0-9]]], {{[wx]}}0, #0, #1
29-
// CHECKO-arm64-NEXT: dup.${neonSuffix} v0, [[REG]]
30-
// CHECKO-arm64-NEXT: ret
31-
// CHECKOnone-arm64: dup.${neonSuffix}
32-
// CHECKOnone-arm64: ret
26+
// CHECK: repeating${n}_mask${bits}{{.*}} {
27+
// CHECK: entry:
28+
// CHECK: [[TMP:%[0-9]+]] = insertelement <${n} x i${bits}> {{.*}}, i${bits} %{{.*}}, i32 0
29+
// CHECK-NEXT: [[REP:%[0-9]+]] = shufflevector <${n} x i${bits}> [[TMP]], <${n} x i${bits}> {{.*}}, <${n} x i32> zeroinitializer
30+
% if totalBits == 64:
31+
// CHECK-arm64-NEXT: ret <${n} x i${bits}> [[REP]]
32+
% else:
33+
// CHECK-NEXT: ret <${n} x i${bits}> [[REP]]
34+
% end
3335

3436
% end
3537
% end

‎test/stdlib/SIMDSignedInitializers.swift.gyb

Lines changed: 10 additions & 56 deletions
Original file line numberDiff line numberDiff line change
@@ -11,8 +11,7 @@
1111
//===----------------------------------------------------------------------===//
1212
// RUN: %empty-directory(%t)
1313
// RUN: %gyb %s -o %t/SIMDSignedInitializers.swift
14-
// RUN: %target-swift-frontend -primary-file %t/SIMDSignedInitializers.swift -S | %FileCheck %t/SIMDSignedInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKOnone-%target-cpu
15-
// RUN: %target-swift-frontend -primary-file %t/SIMDSignedInitializers.swift -S -O | %FileCheck %t/SIMDSignedInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu --check-prefix=CHECKO-%target-cpu
14+
// RUN: %target-swift-frontend -primary-file %t/SIMDSignedInitializers.swift -emit-ir | %FileCheck %t/SIMDSignedInitializers.swift --check-prefix=CHECK --check-prefix=CHECK-%target-cpu
1615

1716
import Swift
1817

@@ -25,60 +24,15 @@ import Swift
2524
func repeating${n}_int${bits}(_ scalar: Int${bits}) -> SIMD${n}<Int${bits}> {
2625
SIMD${n}(repeating: scalar)
2726
}
28-
// CHECK: repeating${n}_int${bits}{{[[:alnum:]_]+}}:
29-
// CHECKO-arm64-NEXT: dup.${neonSuffix} v0, {{[wx]}}0
30-
// CHECKO-arm64-NEXT: ret
31-
// CHECKOnone-arm64: dup.${neonSuffix}
32-
// CHECKOnone-arm64: ret
27+
// CHECK: repeating${n}_int${bits}{{.*}} {
28+
// CHECK: entry:
29+
// CHECK: [[TMP:%[0-9]+]] = insertelement <${n} x i${bits}> {{.*}}, i${bits} %0, i32 0
30+
// CHECK-NEXT: [[REP:%[0-9]+]] = shufflevector <${n} x i${bits}> [[TMP]], <${n} x i${bits}> {{.*}}, <${n} x i32> zeroinitializer
31+
% if totalBits == 64:
32+
// CHECK-arm64-NEXT: ret <${n} x i${bits}> [[REP]]
33+
% else:
34+
// CHECK-NEXT: ret <${n} x i${bits}> [[REP]]
35+
% end
3336
% end
3437
% end
3538
%end
36-
37-
func concat8x8(_ a: SIMD8<Int8>, _ b: SIMD8<Int8>) -> SIMD16<Int8> {
38-
SIMD16(lowHalf: a, highHalf: b)
39-
}
40-
// CHECK: s22SIMDSignedInitializers9concat8x8ys6SIMD16Vys4Int8VGs5SIMD8VyAFG_AJtF:
41-
// CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
42-
// CHECKO-arm64-NEXT: ret
43-
// CHECKO-x86_64: punpcklqdq
44-
45-
func concat16x8(_ a: SIMD16<Int8>, _ b: SIMD16<Int8>) -> SIMD32<Int8> {
46-
SIMD32(lowHalf: a, highHalf: b)
47-
}
48-
// CHECK: s22SIMDSignedInitializers10concat16x8ys6SIMD32Vys4Int8VGs6SIMD16VyAFG_AJtF:
49-
// CHECKO-arm64-NEXT: ret
50-
51-
func concat4x16(_ a: SIMD4<Int16>, _ b: SIMD4<Int16>) -> SIMD8<Int16> {
52-
SIMD8(lowHalf: a, highHalf: b)
53-
}
54-
// CHECK: s22SIMDSignedInitializers10concat4x16ys5SIMD8Vys5Int16VGs5SIMD4VyAFG_AJtF:
55-
// CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
56-
// CHECKO-arm64-NEXT: ret
57-
// CHECKO-x86_64: punpcklqdq
58-
59-
func concat8x16(_ a: SIMD8<Int16>, _ b: SIMD8<Int16>) -> SIMD16<Int16> {
60-
SIMD16(lowHalf: a, highHalf: b)
61-
}
62-
// CHECK: s22SIMDSignedInitializers10concat8x16ys6SIMD16Vys5Int16VGs5SIMD8VyAFG_AJtF:
63-
// CHECKO-arm64-NEXT: ret
64-
65-
func concat2x32(_ a: SIMD2<Int32>, _ b: SIMD2<Int32>) -> SIMD4<Int32> {
66-
SIMD4(lowHalf: a, highHalf: b)
67-
}
68-
// CHECK: s22SIMDSignedInitializers10concat2x32ys5SIMD4Vys5Int32VGs5SIMD2VyAFG_AJtF:
69-
// CHECKO-arm64-NEXT: mov.d v0[1], v1[0]
70-
// CHECKO-arm64-NEXT: ret
71-
// CHECKO-x86_64: punpcklqdq
72-
73-
func concat4x32(_ a: SIMD4<Int32>, _ b: SIMD4<Int32>) -> SIMD8<Int32> {
74-
SIMD8(lowHalf: a, highHalf: b)
75-
}
76-
// CHECK: s22SIMDSignedInitializers10concat4x32ys5SIMD8Vys5Int32VGs5SIMD4VyAFG_AJtF:
77-
// CHECKO-arm64-NEXT: ret
78-
79-
func concat2x64(_ a: SIMD2<Int64>, _ b: SIMD2<Int64>) -> SIMD4<Int64> {
80-
SIMD4(lowHalf: a, highHalf: b)
81-
}
82-
// CHECK: s22SIMDSignedInitializers10concat2x64ys5SIMD4Vys5Int64VGs5SIMD2VyAFG_AJtF:
83-
// CHECKO-arm64-NEXT: ret
84-

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