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This issue aims to list all U(S)ART requests:
- Hardware Flow control for serial communication (Hardware Flow control for serial communication #394) --> [U(S)ART] hardware flow control support #1634Support for UART RX/TX level inversion (Support for UART RX/TX level inversion on F3/F7 platforms #1160 and Support U[S]ART Inversion on STM32U0 #2669) --> feat(uart): support UART Tx, Rx and Data invert function #2701HardwareSerial Error Callback( HardwareSerial Error Callback #1162) --> wont fix as only one request and no work on this.Support 9 Bit Mode ([U(S)ART] request list #1418 (comment)) --> Only one requestand not supported by Arduino Core API.To pick up a draggable item, press the space bar. While dragging, use the arrow keys to move the item. Press space again to drop the item in its new position, or press escape to cancel.
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This is a community projects, Any contribution is welcome, so feel free submit a PR. 😉
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4ndreas commentedon Jul 6, 2021
I needed the 9 Bit Mode for a project and changed all the buffers to uint16_t and it worked. But I'm not sure if there are some side effects.
Could also solved with a flag for the 9th bit.
fpistm commentedon Jul 6, 2021
Hi @4ndreas
THis was discussed some years ago:
#482 (comment)
Main risk is the compatibility issue. I've added the request to the list.
matthijskooijman commentedon Aug 5, 2021
I have one more suggestion for the list: Support serial writes when interrupts are disabled (e.g. from an ISR). This would make debugging a lot easier, and prevent surprise when someone prints from an ISR and the entire board locks up as soon as the buffer is full.
To support this usecase, the busy-wait loops in
flush()
andwrite()
must be modified to call the ISR (or other code that moves the buffer into the UART) whenever a bit is written.I implemented something similar on the Arduino AVR core, where IIRC it checks if interrupts are disabled, and if so, checks the TXE bit inside the busywait loop and calls the ISR if it is set. A similar approach can be taken here, though there are some complications:
The second point makes this more complicated than I have time for right now, but I at least wanted to share this request and my thoughts.
Disable debug printing in processCommand
fpistm commentedon Aug 10, 2021
Thanks @matthijskooijman for sharing.
Just FYI it exists an uart debug feature which does not rely on IT:
serial_debug
Defining DEBUG_UART (USART peripheral, ex: USART1) and
DEBUG_PINNAME_TX
(PY_n) allows to specify the pin to use else by default it uses the same than default Serial instance. This fallback touart_debug_write
.akasona commentedon Aug 20, 2021
@fpistm I want to make PR for the item: Hardware Flow control for serial communication.
Where can I find any rules or workflows to contribute this project?
fpistm commentedon Sep 7, 2021
Hi @akasona
Sorry, I missed your comment.
You can refers to the https://github.com/stm32duino/Arduino_Core_STM32/blob/master/CONTRIBUTING.md
To resume:
Fork
Implement
Ensure Astyle is passed
Submit the PR
That's all folks 😉
ht93 commentedon Dec 16, 2021
@fpistm For #1160 UART RX/TX level inversion on F3/F7 platforms. Is it possible implement similar function to F4 platform? Or is there any workaround besides hardware way like add physical inverter?
fpistm commentedon Dec 16, 2021
Hi @ht93 , it seems not available fo F4.
10 remaining items
mhmayyan commentedon Oct 29, 2024
Hi
I am unable to start UART with a 1200 baud rate. I used Serial.begin(1200), but no data were transmitted. When I try a 2400 and higher baud rates, it works. Does anyone have any idea?
I tried Nucelo-L476RE and B-L4S5I-IOT01A.
fronders commentedon Oct 30, 2024
@mhmayyan It's probably that the BRR value would overflow 0xFFFF for your desired rate at given core frequency.
IIRC the core runs by default at 80MHz so that would give you bauds between 1220 bps and 5Mbps. I don't know if you check the return code, but at 1200 it would probably just not initialize and return an error
p.s. I'd recommend opening a separate issue not to flood the request list
fpistm commentedon Oct 30, 2024
Hi @mhmayyan
@fronders gave the right answer.
BRR is overflowed, you have to decrease the clock config and for this kind of question you can open a GitHub discussion.
feat(uart): support UART Tx Rx invert function
feat(uart): support UART Tx Rx invert function
feat(uart): support UART Tx Rx invert function
feat(uart): support UART Tx, Rx and data invert function
feat(uart): support UART Tx, Rx and data invert function
feat(uart): support UART Tx, Rx and data invert function
feat(uart): support UART Tx, Rx and data invert function