|  | 
|  | 1 | +#![no_std] | 
|  | 2 | +#![no_main] | 
|  | 3 | + | 
|  | 4 | +use panic_rtt_target as _; | 
|  | 5 | + | 
|  | 6 | +use cortex_m_rt::entry; | 
|  | 7 | +use rtt_target::rprintln; | 
|  | 8 | + | 
|  | 9 | +use stm32l4xx_hal::{ | 
|  | 10 | +    delay::Delay, | 
|  | 11 | +    gpio::{Alternate, Pin, PushPull, H8, L8}, | 
|  | 12 | +    pac, | 
|  | 13 | +    prelude::*, | 
|  | 14 | +    rcc::{MsiFreq, PllConfig}, | 
|  | 15 | +    sai::{I2SChanConfig, I2SDataSize, I2SDir, I2sUsers, Sai}, | 
|  | 16 | +    traits::i2s::FullDuplex, | 
|  | 17 | +}; | 
|  | 18 | + | 
|  | 19 | +type SaiPins = ( | 
|  | 20 | +    Pin<Alternate<PushPull, 13_u8>, L8, 'E', 2_u8>, | 
|  | 21 | +    Pin<Alternate<PushPull, 13_u8>, L8, 'E', 5_u8>, | 
|  | 22 | +    Pin<Alternate<PushPull, 13_u8>, L8, 'E', 4_u8>, | 
|  | 23 | +    Pin<Alternate<PushPull, 13_u8>, L8, 'E', 6_u8>, | 
|  | 24 | +    Option<Pin<Alternate<PushPull, 13_u8>, H8, 'A', 13_u8>>, | 
|  | 25 | +); | 
|  | 26 | + | 
|  | 27 | +#[entry] | 
|  | 28 | +fn main() -> ! { | 
|  | 29 | +    rtt_target::rtt_init_print!(); | 
|  | 30 | +    rprintln!("Initializing... "); | 
|  | 31 | + | 
|  | 32 | +    let cp = pac::CorePeripherals::take().unwrap(); | 
|  | 33 | +    let dp = pac::Peripherals::take().unwrap(); | 
|  | 34 | + | 
|  | 35 | +    let mut flash = dp.FLASH.constrain(); | 
|  | 36 | +    let mut rcc = dp.RCC.constrain(); | 
|  | 37 | +    let mut pwr = dp.PWR.constrain(&mut rcc.apb1r1); | 
|  | 38 | + | 
|  | 39 | +    let clocks = rcc | 
|  | 40 | +        .cfgr | 
|  | 41 | +        .msi(MsiFreq::RANGE8M) | 
|  | 42 | +        .sysclk(80.mhz()) | 
|  | 43 | +        .hclk(80.mhz()) | 
|  | 44 | +        .pclk1(80.mhz()) | 
|  | 45 | +        .pclk2(80.mhz()) | 
|  | 46 | +        .sai1clk_with_pll(4_016_000.hz(), PllConfig::new(1, 13, Some(25), None, None)) | 
|  | 47 | +        .freeze(&mut flash.acr, &mut pwr); | 
|  | 48 | + | 
|  | 49 | +    rprintln!( | 
|  | 50 | +        "clocks: sysclk: {:?}, hclk: {:?}, pclk1: {:?}, pclk2: {:?}", | 
|  | 51 | +        clocks.sysclk().0, | 
|  | 52 | +        clocks.hclk().0, | 
|  | 53 | +        clocks.pclk1().0, | 
|  | 54 | +        clocks.pclk2().0 | 
|  | 55 | +    ); | 
|  | 56 | + | 
|  | 57 | +    let mut delay = Delay::new(cp.SYST, clocks); | 
|  | 58 | + | 
|  | 59 | +    // GPIO | 
|  | 60 | +    /////// | 
|  | 61 | + | 
|  | 62 | +    let mut gpioe = dp.GPIOE.split(&mut rcc.ahb2); | 
|  | 63 | + | 
|  | 64 | +    let mclk = | 
|  | 65 | +        gpioe | 
|  | 66 | +            .pe2 | 
|  | 67 | +            .into_alternate_push_pull(&mut gpioe.moder, &mut gpioe.otyper, &mut gpioe.afrl); | 
|  | 68 | +    let fs = | 
|  | 69 | +        gpioe | 
|  | 70 | +            .pe4 | 
|  | 71 | +            .into_alternate_push_pull(&mut gpioe.moder, &mut gpioe.otyper, &mut gpioe.afrl); | 
|  | 72 | +    let sck = | 
|  | 73 | +        gpioe | 
|  | 74 | +            .pe5 | 
|  | 75 | +            .into_alternate_push_pull(&mut gpioe.moder, &mut gpioe.otyper, &mut gpioe.afrl); | 
|  | 76 | +    let fd = | 
|  | 77 | +        gpioe | 
|  | 78 | +            .pe6 | 
|  | 79 | +            .into_alternate_push_pull(&mut gpioe.moder, &mut gpioe.otyper, &mut gpioe.afrl); | 
|  | 80 | + | 
|  | 81 | +    let sai_pins: SaiPins = (mclk, sck, fs, fd, None); | 
|  | 82 | + | 
|  | 83 | +    rprintln!("Sai... "); | 
|  | 84 | +    let mut sai = Sai::i2s_sai1_ch_a( | 
|  | 85 | +        dp.SAI1, | 
|  | 86 | +        sai_pins, | 
|  | 87 | +        16_000.hz(), | 
|  | 88 | +        I2SDataSize::Bits24, | 
|  | 89 | +        &mut rcc.apb2, | 
|  | 90 | +        &clocks, | 
|  | 91 | +        I2sUsers::new(I2SChanConfig::new(I2SDir::Tx)), | 
|  | 92 | +    ); | 
|  | 93 | + | 
|  | 94 | +    rprintln!("Sai enable... "); | 
|  | 95 | +    sai.enable(); | 
|  | 96 | + | 
|  | 97 | +    rprintln!("Looping... "); | 
|  | 98 | +    loop { | 
|  | 99 | +        sai.try_send(0xaa, 0xcc).unwrap(); | 
|  | 100 | +        delay.delay_ms(5_u32); | 
|  | 101 | +    } | 
|  | 102 | +} | 
0 commit comments