Added default transactional spi impl

Author: ryankurte

Cargo.toml

@@ -124,3 +124,8 @@ required-features = ["rt", "stm32f429"]
 [[example]]
 name = "rng-display"
 required-features = ["rt", "stm32f407"]
+
+
+[patch.crates-io]
+#embedded-hal = { git = "https://github.com/ryankurte/embedded-hal.git", branch = "feature/spi-transactions" }
+embedded-hal = { path = "../embedded-hal" }

src/spi.rs

@@ -1059,3 +1059,8 @@ impl<SPI, PINS> embedded_hal::blocking::spi::write::Default<u8> for Spi<SPI, PIN
     SPI: Deref<Target = spi1::RegisterBlock>
 {
 }
+
+impl<SPI, PINS> embedded_hal::blocking::spi::transactional::Default<u8> for Spi<SPI, PINS> where
+    SPI: Deref<Target = spi1::RegisterBlock>
+{
+}

src/timer.rs

@@ -4,7 +4,7 @@ use cast::{u16, u32};
 use cortex_m::peripheral::syst::SystClkSource;
 use cortex_m::peripheral::SYST;
 use embedded_hal::timer::{Cancel, CountDown, Periodic};
-use void::Void;
+use core::convert::Infallible;
 
 use crate::stm32::RCC;
 #[cfg(any(
@@ -146,7 +146,7 @@ impl CountDown for Timer<SYST> {
         self.tim.enable_counter();
     }
 
-    fn wait(&mut self) -> nb::Result<(), Void> {
+    fn wait(&mut self) -> nb::Result<(), Infallible> {
         if self.tim.has_wrapped() {
             Ok(())
         } else {
@@ -264,7 +264,7 @@ macro_rules! hal {
                     self.tim.cr1.modify(|_, w| w.cen().set_bit());
                 }
 
-                fn wait(&mut self) -> nb::Result<(), Void> {
+                fn wait(&mut self) -> nb::Result<(), Infallible> {
                     if self.tim.sr.read().uif().bit_is_clear() {
                         Err(nb::Error::WouldBlock)
                     } else {