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Add some documentation to serial
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1 file changed

+50
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src/serial.rs

Lines changed: 50 additions & 18 deletions
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,28 @@
1+
//! API for the integrated USART ports
2+
//!
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//! This only implements the usual asynchronous bidirectional 8-bit transfers, everything else is missing
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//!
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//! # Example
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//! Serial Echo
7+
//! ``` no_run
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//! use stm32f0xx_hal as hal;
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//!
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//! use crate::hal::stm32;
11+
//! use crate::hal::prelude::*;
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//! use crate::hal::serial::Serial;
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//! use nb::block;
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//!
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//! let mut p = stm32::Peripherals::take().unwrap();
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//!
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//! let mut led = gpioa.pa1.into_push_pull_pull_output();
18+
//! let rcc = p.RCC.constrain().cfgr.freeze();
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//! let mut timer = Timer::tim1(p.TIM1, Hertz(1), clocks);
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//! loop {
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//! led.toggle();
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//! block!(timer.wait()).ok();
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//! }
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//! ```
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126
use core::fmt::{Result, Write};
227
use core::ops::Deref;
328
use core::ptr;
@@ -98,30 +123,31 @@ macro_rules! usart {
98123
$(
99124
use crate::stm32::$USART;
100125
impl<PINS> Serial<$USART, PINS> {
101-
pub fn $usart(usart: $USART, pins: PINS, baud_rate: Bps, clocks: Clocks) -> Self
102-
where
103-
PINS: Pins<$USART>,
104-
{
105-
// NOTE(unsafe) This executes only during initialisation
106-
let rcc = unsafe { &(*stm32::RCC::ptr()) };
126+
/// Creates a new serial instance
127+
pub fn $usart(usart: $USART, pins: PINS, baud_rate: Bps, clocks: Clocks) -> Self
128+
where
129+
PINS: Pins<$USART>,
130+
{
131+
// NOTE(unsafe) This executes only during initialisation
132+
let rcc = unsafe { &(*stm32::RCC::ptr()) };
107133

108-
/* Enable clock for USART */
109-
rcc.$apbenr.modify(|_, w| w.$usartXen().set_bit());
134+
/* Enable clock for USART */
135+
rcc.$apbenr.modify(|_, w| w.$usartXen().set_bit());
110136

111-
// Calculate correct baudrate divisor on the fly
112-
let brr = clocks.pclk().0 / baud_rate.0;
113-
usart.brr.write(|w| unsafe { w.bits(brr) });
137+
// Calculate correct baudrate divisor on the fly
138+
let brr = clocks.pclk().0 / baud_rate.0;
139+
usart.brr.write(|w| unsafe { w.bits(brr) });
114140

115-
/* Reset other registers to disable advanced USART features */
116-
usart.cr2.reset();
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usart.cr3.reset();
141+
/* Reset other registers to disable advanced USART features */
142+
usart.cr2.reset();
143+
usart.cr3.reset();
118144

119-
/* Enable transmission and receiving */
120-
usart.cr1.modify(|_, w| unsafe { w.bits(0xD) });
145+
/* Enable transmission and receiving */
146+
usart.cr1.modify(|_, w| unsafe { w.bits(0xD) });
121147

122-
Serial { usart, pins }
123-
}
148+
Serial { usart, pins }
124149
}
150+
}
125151
)+
126152
}
127153
}
@@ -157,6 +183,7 @@ where
157183
{
158184
type Error = Error;
159185

186+
/// Tries to read a byte from the uart
160187
fn read(&mut self) -> nb::Result<u8, Error> {
161188
// NOTE(unsafe) atomic read with no side effects
162189
let isr = unsafe { (*self.usart).isr.read() };
@@ -184,6 +211,7 @@ where
184211
{
185212
type Error = Void;
186213

214+
/// Ensures that none of the previously written words are still buffered
187215
fn flush(&mut self) -> nb::Result<(), Self::Error> {
188216
// NOTE(unsafe) atomic read with no side effects
189217
let isr = unsafe { (*self.usart).isr.read() };
@@ -195,6 +223,8 @@ where
195223
}
196224
}
197225

226+
/// Tries to write a byte to the uart
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/// Fails if the transmit buffer is full
198228
fn write(&mut self, byte: u8) -> nb::Result<(), Self::Error> {
199229
// NOTE(unsafe) atomic read with no side effects
200230
let isr = unsafe { (*self.usart).isr.read() };
@@ -215,6 +245,8 @@ where
215245
USART: Deref<Target = SerialRegisterBlock>,
216246
PINS: Pins<USART>,
217247
{
248+
/// Splits the UART Peripheral in a Tx and an Rx part
249+
/// This is required for sending/receiving
218250
pub fn split(self) -> (Tx<USART>, Rx<USART>) {
219251
(
220252
Tx {

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