Initial

Author: samcrow

.gitignore

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+target
+Cargo.lock
+
+# Covers JetBrains IDEs: IntelliJ, RubyMine, PhpStorm, AppCode, PyCharm, CLion, Android Studio, WebStorm and Rider
+# Reference: https://intellij-support.jetbrains.com/hc/en-us/articles/206544839
+
+# User-specific stuff
+.idea/**/workspace.xml
+.idea/**/tasks.xml
+.idea/**/usage.statistics.xml
+.idea/**/dictionaries
+.idea/**/shelf
+
+# Generated files
+.idea/**/contentModel.xml
+
+# Sensitive or high-churn files
+.idea/**/dataSources/
+.idea/**/dataSources.ids
+.idea/**/dataSources.local.xml
+.idea/**/sqlDataSources.xml
+.idea/**/dynamic.xml
+.idea/**/uiDesigner.xml
+.idea/**/dbnavigator.xml
+
+# Gradle
+.idea/**/gradle.xml
+.idea/**/libraries
+
+# Gradle and Maven with auto-import
+# When using Gradle or Maven with auto-import, you should exclude module files,
+# since they will be recreated, and may cause churn.  Uncomment if using
+# auto-import.
+# .idea/artifacts
+# .idea/compiler.xml
+# .idea/jarRepositories.xml
+# .idea/modules.xml
+# .idea/*.iml
+# .idea/modules
+# *.iml
+# *.ipr
+
+# CMake
+cmake-build-*/
+
+# Mongo Explorer plugin
+.idea/**/mongoSettings.xml
+
+# File-based project format
+*.iws
+
+# IntelliJ
+out/
+
+# mpeltonen/sbt-idea plugin
+.idea_modules/
+
+# JIRA plugin
+atlassian-ide-plugin.xml
+
+# Cursive Clojure plugin
+.idea/replstate.xml
+
+# Crashlytics plugin (for Android Studio and IntelliJ)
+com_crashlytics_export_strings.xml
+crashlytics.properties
+crashlytics-build.properties
+fabric.properties
+
+# Editor-based Rest Client
+.idea/httpRequests
+
+# Android studio 3.1+ serialized cache file
+.idea/caches/build_file_checksums.ser

.idea/.gitignore

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+[package]
+name = "stm32_i2s"
+version = "0.1.0"
+authors = ["Sam Crow <[email protected]>"]
+edition = "2018"
+description = "Driver for the SPI peripherals (in I2S mode) for some STM32 microcontrollers"
+license = "0BSD"
+repository = "https://github.com/samcrow/stm32_i2s"
+# Build script for examples only
+build = "build.rs"
+
+[dependencies]
+vcell = "0.1.3"
+nb = "1.0.0"
+
+# Dependencies for examples
+[dev-dependencies]
+cortex-m-rt = "0.6.13"
+nb = "1.0.0"
+
+[dev-dependencies.rtt-target]
+version = "0.3.0"
+features = ["cortex-m"]
+
+[dev-dependencies.panic-rtt-target]
+version = "0.1.1"
+features = ["cortex-m"]
+
+# Needs an unreleased version to set up the I2S clocks correctly
+[dev-dependencies.stm32f4xx-hal]
+git = "https://github.com/stm32-rs/stm32f4xx-hal"
+rev = "1f0385fec243693537750b5baee2ac7d1dbc06e7"
+features = ["stm32f412", "rt"]

.idea/modules.xml

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+# cargo-embed configuration file for running the examples
+[default.general]
+chip = "STM32F412VGTx"
+
+[default.rtt]
+enabled = true

.idea/stm32_i2s.iml

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+Copyright (C) 2021 by Sam Crow
+
+Permission to use, copy, modify, and/or distribute this software for any
+purpose with or without fee is hereby granted.
+
+THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES WITH
+REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND
+FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY SPECIAL, DIRECT,
+INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
+LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ACTION OF CONTRACT, NEGLIGENCE OR
+OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION WITH THE USE OR
+PERFORMANCE OF THIS SOFTWARE.

.idea/vcs.xml

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+# STM32 I2S driver
+
+This library provides a driver for I2S communication using the SPI peripherals on some STM32 microcontrollers.
+
+## Differences between STM32 models
+
+According to application note [AN5543](https://www.st.com/resource/en/application_note/dm00725181-enhanced-methods-to-handle-spi-communication-on-stm32-devices-stmicroelectronics.pdf),
+there are four major versions of the SPI/I2S peripheral used on STM32 microcontrollers:
+
+* 1.2.x: F1, F2, F4, L0, L1
+* 1.3.x: F0, F3, F7, L4, L5, WB, WL
+* 2.x.x: H7, MP1
+* 3.x.x: "Most of STM32 devices launched in 2021 or later"
+
+This library currently has code for SPI version 1.2 (STM32F1, STM32F2, STM32F4, STM32L0, and STM32L1).
+
+## Status
+
+This library has been tested on a few different STM32F4 microcontrollers. The
+other models that use the same SPI version (F1, F2, L0, and L1) may work,
+but I have not tested any of them.
+
+## License
+
+0-clause BSD (see LICENSE.txt)

Cargo.toml

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+//! This build script is only needed for the examples. When just building the library,
+//! it still runs but should have no effect.
+
+use std::env;
+use std::fs::File;
+use std::io::Write;
+use std::path::PathBuf;
+
+fn main() {
+    // Put the linker script somewhere the linker can find it
+    let out = &PathBuf::from(env::var_os("OUT_DIR").unwrap());
+    File::create(out.join("memory.x"))
+        .unwrap()
+        .write_all(include_bytes!("memory.x"))
+        .unwrap();
+    println!("cargo:rustc-link-search={}", out.display());
+
+    // Only re-run the build script when memory.x is changed,
+    // instead of when any part of the source code changes.
+    println!("cargo:rerun-if-changed=memory.x");
+}

Embed.toml

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+//!
+//! Periodically transmits a sequence of 16-bit samples using SPI1/I2S1 on an STM32F412
+//!
+//! Pins:
+//! * PA4, AF5 - I2S1_WS
+//! * PA5, AF5 - I2S1_CK
+//! * PA7, AF5 - I2S1_SD
+//!
+//! To compile:
+//! RUSTFLAGS="-C link-arg=-Tlink.x" cargo build --example master_transmit_d16f16 --target thumbv7em-none-eabihf --release
+//!
+//! This uses some unsafe code so that it can depend on a version of stm32f4xx-hal that does not
+//! depend on stm32_i2s.
+//!
+
+#![no_std]
+#![no_main]
+
+extern crate cortex_m_rt;
+extern crate nb;
+extern crate panic_rtt_target;
+extern crate rtt_target;
+extern crate stm32_i2s;
+extern crate stm32f4xx_hal;
+
+use stm32f4xx_hal::hal::prelude::*;
+use stm32f4xx_hal::pac::{CorePeripherals, Peripherals};
+use stm32f4xx_hal::prelude::*;
+use stm32f4xx_hal::timer::Timer;
+
+use stm32_i2s::v12x::format::{Data16Frame16, FrameFormat};
+use stm32_i2s::v12x::{I2s, Instance, MasterConfig, RegisterBlock};
+use stm32_i2s::Polarity;
+
+/// 16-bit samples to transmit
+const TEST_SAMPLES: [i16; 12] = [
+    0x0000,
+    0x0000,
+    0xaa55_u16 as i16,
+    0x55aa_u16 as i16,
+    0x0000_u16 as i16,
+    0xffff_u16 as i16,
+    0x1010_u16 as i16,
+    0xaaaa_u16 as i16,
+    0x5555_u16 as i16,
+    0xe621_u16 as i16,
+    0x0000,
+    0x0000,
+];
+
+/// Sample rates to test
+const SAMPLE_RATES: [u32; 8] = [8000, 16000, 22050, 32000, 44100, 48000, 96000, 192000];
+
+#[cortex_m_rt::entry]
+fn main() -> ! {
+    let cp = CorePeripherals::take().unwrap();
+    let dp = Peripherals::take().unwrap();
+    // RTT for logging
+    rtt_target::rtt_init_print!();
+
+    let rcc = dp.RCC.constrain();
+    // SPI1/I2S1 is on APB2
+    let clocks = rcc
+        .cfgr
+        .sysclk(100.mhz())
+        .i2s_apb1_clk(38400.khz())
+        .i2s_apb2_clk(38400.khz())
+        .freeze();
+
+    // Use systick to run periodically
+    let mut systick = Timer::syst(cp.SYST, 1000.hz(), clocks);
+
+    let gpioa = dp.GPIOA.split();
+    let _i2s_pins = (
+        gpioa.pa4.into_alternate_af5(),
+        gpioa.pa5.into_alternate_af5(),
+        gpioa.pa7.into_alternate_af5(),
+    );
+    let mut sync_pin = gpioa.pa1.into_push_pull_output();
+    sync_pin.set_low().unwrap();
+
+    // Access the RCC registers directly to enable SPI1
+    unsafe {
+        let rcc_registers = stm32f4xx_hal::pac::RCC::ptr();
+        (*rcc_registers).apb2enr.modify(|_, w| w.spi1en().enabled());
+    }
+
+    let mut i2s = I2s::new(I2s1Substitute);
+
+    loop {
+        for &sample_rate in SAMPLE_RATES.iter() {
+            let config = MasterConfig::with_sample_rate(
+                clocks.i2s_apb2_clk().unwrap().0,
+                sample_rate,
+                Data16Frame16,
+                FrameFormat::PhilipsI2s,
+                Polarity::IdleHigh,
+                false,
+            );
+            let mut configured_i2s = i2s.configure_master_transmit(config);
+
+            configured_i2s.enable();
+            configured_i2s.transmit_blocking(&TEST_SAMPLES);
+            nb::block!(configured_i2s.disable()).unwrap();
+
+            i2s = configured_i2s.deconfigure();
+
+            nb::block!(systick.wait()).unwrap();
+        }
+        sync_pin.toggle().unwrap();
+    }
+}
+
+struct I2s1Substitute;
+
+unsafe impl Instance for I2s1Substitute {
+    const REGISTERS: *mut RegisterBlock = stm32f4xx_hal::pac::SPI1::ptr() as *mut RegisterBlock;
+}