@@ -281,23 +281,6 @@ impl AddAssign<u64> for VirtAddr {
281
281
}
282
282
}
283
283
284
- #[ cfg( target_pointer_width = "64" ) ]
285
- impl Add < usize > for VirtAddr {
286
- type Output = Self ;
287
- #[ inline]
288
- fn add ( self , rhs : usize ) -> Self :: Output {
289
- self + rhs as u64
290
- }
291
- }
292
-
293
- #[ cfg( target_pointer_width = "64" ) ]
294
- impl AddAssign < usize > for VirtAddr {
295
- #[ inline]
296
- fn add_assign ( & mut self , rhs : usize ) {
297
- self . add_assign ( rhs as u64 )
298
- }
299
- }
300
-
301
284
impl Sub < u64 > for VirtAddr {
302
285
type Output = Self ;
303
286
#[ inline]
@@ -313,23 +296,6 @@ impl SubAssign<u64> for VirtAddr {
313
296
}
314
297
}
315
298
316
- #[ cfg( target_pointer_width = "64" ) ]
317
- impl Sub < usize > for VirtAddr {
318
- type Output = Self ;
319
- #[ inline]
320
- fn sub ( self , rhs : usize ) -> Self :: Output {
321
- self - rhs as u64
322
- }
323
- }
324
-
325
- #[ cfg( target_pointer_width = "64" ) ]
326
- impl SubAssign < usize > for VirtAddr {
327
- #[ inline]
328
- fn sub_assign ( & mut self , rhs : usize ) {
329
- self . sub_assign ( rhs as u64 )
330
- }
331
- }
332
-
333
299
impl Sub < VirtAddr > for VirtAddr {
334
300
type Output = u64 ;
335
301
#[ inline]
@@ -564,23 +530,6 @@ impl AddAssign<u64> for PhysAddr {
564
530
}
565
531
}
566
532
567
- #[ cfg( target_pointer_width = "64" ) ]
568
- impl Add < usize > for PhysAddr {
569
- type Output = Self ;
570
- #[ inline]
571
- fn add ( self , rhs : usize ) -> Self :: Output {
572
- self + rhs as u64
573
- }
574
- }
575
-
576
- #[ cfg( target_pointer_width = "64" ) ]
577
- impl AddAssign < usize > for PhysAddr {
578
- #[ inline]
579
- fn add_assign ( & mut self , rhs : usize ) {
580
- self . add_assign ( rhs as u64 )
581
- }
582
- }
583
-
584
533
impl Sub < u64 > for PhysAddr {
585
534
type Output = Self ;
586
535
#[ inline]
@@ -596,23 +545,6 @@ impl SubAssign<u64> for PhysAddr {
596
545
}
597
546
}
598
547
599
- #[ cfg( target_pointer_width = "64" ) ]
600
- impl Sub < usize > for PhysAddr {
601
- type Output = Self ;
602
- #[ inline]
603
- fn sub ( self , rhs : usize ) -> Self :: Output {
604
- self - rhs as u64
605
- }
606
- }
607
-
608
- #[ cfg( target_pointer_width = "64" ) ]
609
- impl SubAssign < usize > for PhysAddr {
610
- #[ inline]
611
- fn sub_assign ( & mut self , rhs : usize ) {
612
- self . sub_assign ( rhs as u64 )
613
- }
614
- }
615
-
616
548
impl Sub < PhysAddr > for PhysAddr {
617
549
type Output = u64 ;
618
550
#[ inline]
0 commit comments