@@ -7602,6 +7602,26 @@ pub unsafe fn vrsrad_n_u64<const N: i32>(a: u64, b: u64) -> u64 {
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transmute(simd_add(transmute(a), b))
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}
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+ /// Insert vector element from another vector element
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(nop, LANE = 0))]
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+ #[rustc_legacy_const_generics(2)]
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+ pub unsafe fn vset_lane_f64<const LANE: i32>(a: f64, b: float64x1_t) -> float64x1_t {
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+ static_assert!(LANE : i32 where LANE == 0);
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+ simd_insert(b, LANE as u32, a)
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+ }
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+
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+ /// Insert vector element from another vector element
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+ #[inline]
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+ #[target_feature(enable = "neon")]
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+ #[cfg_attr(test, assert_instr(nop, LANE = 0))]
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+ #[rustc_legacy_const_generics(2)]
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+ pub unsafe fn vsetq_lane_f64<const LANE: i32>(a: f64, b: float64x2_t) -> float64x2_t {
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+ static_assert_imm1!(LANE);
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+ simd_insert(b, LANE as u32, a)
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+ }
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+
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/// Signed Shift left
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#[inline]
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#[target_feature(enable = "neon")]
@@ -15111,6 +15131,24 @@ mod test {
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assert_eq!(r, e);
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}
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vset_lane_f64() {
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+ let a: f64 = 1.;
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+ let b: f64 = 0.;
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+ let e: f64 = 1.;
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+ let r: f64 = transmute(vset_lane_f64::<0>(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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+ #[simd_test(enable = "neon")]
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+ unsafe fn test_vsetq_lane_f64() {
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+ let a: f64 = 1.;
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+ let b: f64x2 = f64x2::new(0., 2.);
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+ let e: f64x2 = f64x2::new(1., 2.);
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+ let r: f64x2 = transmute(vsetq_lane_f64::<0>(transmute(a), transmute(b)));
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+ assert_eq!(r, e);
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+ }
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+
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#[simd_test(enable = "neon")]
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unsafe fn test_vshld_s64() {
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let a: i64 = 1;
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