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some Avx512f to const generics (#1064)
1 parent 894f3b7 commit d9ee7a4

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+826
-642
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4 files changed

+826
-642
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crates/core_arch/src/x86/avx2.rs

+17-17
Original file line numberDiff line numberDiff line change
@@ -153,28 +153,28 @@ pub unsafe fn _mm256_adds_epu16(a: __m256i, b: __m256i) -> __m256i {
153153
/// [Intel's documentation](https://software.intel.com/sites/landingpage/IntrinsicsGuide/#text=_mm256_alignr_epi8)
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#[inline]
155155
#[target_feature(enable = "avx2")]
156-
#[cfg_attr(test, assert_instr(vpalignr, n = 7))]
157-
#[rustc_args_required_const(2)]
156+
#[cfg_attr(test, assert_instr(vpalignr, IMM8 = 7))]
157+
#[rustc_legacy_const_generics(2)]
158158
#[stable(feature = "simd_x86", since = "1.27.0")]
159-
pub unsafe fn _mm256_alignr_epi8(a: __m256i, b: __m256i, n: i32) -> __m256i {
160-
let n = n as u32;
161-
// If `palignr` is shifting the pair of vectors more than the size of two
159+
pub unsafe fn _mm256_alignr_epi8<const IMM8: i32>(a: __m256i, b: __m256i) -> __m256i {
160+
static_assert_imm8!(IMM8);
161+
// If palignr is shifting the pair of vectors more than the size of two
162162
// lanes, emit zero.
163-
if n > 32 {
163+
if IMM8 > 32 {
164164
return _mm256_set1_epi8(0);
165165
}
166-
// If `palignr` is shifting the pair of input vectors more than one lane,
166+
// If palignr is shifting the pair of input vectors more than one lane,
167167
// but less than two lanes, convert to shifting in zeroes.
168-
let (a, b, n) = if n > 16 {
169-
(_mm256_set1_epi8(0), a, n - 16)
168+
let (a, b) = if IMM8 > 16 {
169+
(_mm256_set1_epi8(0), a)
170170
} else {
171-
(a, b, n)
171+
(a, b)
172172
};
173173

174174
let a = a.as_i8x32();
175175
let b = b.as_i8x32();
176176

177-
let r: i8x32 = match n {
177+
let r: i8x32 = match IMM8 % 16 {
178178
0 => simd_shuffle32(
179179
b,
180180
a,
@@ -5106,10 +5106,10 @@ mod tests {
51065106
-17, -18, -19, -20, -21, -22, -23, -24,
51075107
-25, -26, -27, -28, -29, -30, -31, -32,
51085108
);
5109-
let r = _mm256_alignr_epi8(a, b, 33);
5109+
let r = _mm256_alignr_epi8::<33>(a, b);
51105110
assert_eq_m256i(r, _mm256_set1_epi8(0));
51115111

5112-
let r = _mm256_alignr_epi8(a, b, 17);
5112+
let r = _mm256_alignr_epi8::<17>(a, b);
51135113
#[rustfmt::skip]
51145114
let expected = _mm256_setr_epi8(
51155115
2, 3, 4, 5, 6, 7, 8, 9,
@@ -5119,7 +5119,7 @@ mod tests {
51195119
);
51205120
assert_eq_m256i(r, expected);
51215121

5122-
let r = _mm256_alignr_epi8(a, b, 4);
5122+
let r = _mm256_alignr_epi8::<4>(a, b);
51235123
#[rustfmt::skip]
51245124
let expected = _mm256_setr_epi8(
51255125
-5, -6, -7, -8, -9, -10, -11, -12,
@@ -5136,10 +5136,10 @@ mod tests {
51365136
-18, -19, -20, -21, -22, -23, -24, -25,
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-26, -27, -28, -29, -30, -31, -32,
51385138
);
5139-
let r = _mm256_alignr_epi8(a, b, 16);
5139+
let r = _mm256_alignr_epi8::<16>(a, b);
51405140
assert_eq_m256i(r, expected);
51415141

5142-
let r = _mm256_alignr_epi8(a, b, 15);
5142+
let r = _mm256_alignr_epi8::<15>(a, b);
51435143
#[rustfmt::skip]
51445144
let expected = _mm256_setr_epi8(
51455145
-16, 1, 2, 3, 4, 5, 6, 7,
@@ -5149,7 +5149,7 @@ mod tests {
51495149
);
51505150
assert_eq_m256i(r, expected);
51515151

5152-
let r = _mm256_alignr_epi8(a, b, 0);
5152+
let r = _mm256_alignr_epi8::<0>(a, b);
51535153
assert_eq_m256i(r, b);
51545154
}
51555155

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