Skip to content

Commit 9d963cf

Browse files
SparrowLiiSparrowLii
committed
correct instruction names
1 parent 99c0d23 commit 9d963cf

File tree

3 files changed

+19
-18
lines changed

3 files changed

+19
-18
lines changed

‎crates/core_arch/src/aarch64/neon/generated.rs

+16-16
Original file line numberDiff line numberDiff line change
@@ -800,7 +800,7 @@ pub unsafe fn vcgtzq_f64(a: float64x2_t) -> uint64x2_t {
800800
/// Compare signed less than or equal to zero
801801
#[inline]
802802
#[target_feature(enable = "neon")]
803-
#[cfg_attr(test, assert_instr(cmle))]
803+
#[cfg_attr(test, assert_instr(cmgt))]
804804
pub unsafe fn vclez_s8(a: int8x8_t) -> uint8x8_t {
805805
let b: i8x8 = i8x8::new(0, 0, 0, 0, 0, 0, 0, 0);
806806
simd_le(a, transmute(b))
@@ -809,7 +809,7 @@ pub unsafe fn vclez_s8(a: int8x8_t) -> uint8x8_t {
809809
/// Compare signed less than or equal to zero
810810
#[inline]
811811
#[target_feature(enable = "neon")]
812-
#[cfg_attr(test, assert_instr(cmle))]
812+
#[cfg_attr(test, assert_instr(cmgt))]
813813
pub unsafe fn vclezq_s8(a: int8x16_t) -> uint8x16_t {
814814
let b: i8x16 = i8x16::new(0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0);
815815
simd_le(a, transmute(b))
@@ -818,7 +818,7 @@ pub unsafe fn vclezq_s8(a: int8x16_t) -> uint8x16_t {
818818
/// Compare signed less than or equal to zero
819819
#[inline]
820820
#[target_feature(enable = "neon")]
821-
#[cfg_attr(test, assert_instr(cmle))]
821+
#[cfg_attr(test, assert_instr(cmgt))]
822822
pub unsafe fn vclez_s16(a: int16x4_t) -> uint16x4_t {
823823
let b: i16x4 = i16x4::new(0, 0, 0, 0);
824824
simd_le(a, transmute(b))
@@ -827,7 +827,7 @@ pub unsafe fn vclez_s16(a: int16x4_t) -> uint16x4_t {
827827
/// Compare signed less than or equal to zero
828828
#[inline]
829829
#[target_feature(enable = "neon")]
830-
#[cfg_attr(test, assert_instr(cmle))]
830+
#[cfg_attr(test, assert_instr(cmgt))]
831831
pub unsafe fn vclezq_s16(a: int16x8_t) -> uint16x8_t {
832832
let b: i16x8 = i16x8::new(0, 0, 0, 0, 0, 0, 0, 0);
833833
simd_le(a, transmute(b))
@@ -836,7 +836,7 @@ pub unsafe fn vclezq_s16(a: int16x8_t) -> uint16x8_t {
836836
/// Compare signed less than or equal to zero
837837
#[inline]
838838
#[target_feature(enable = "neon")]
839-
#[cfg_attr(test, assert_instr(cmle))]
839+
#[cfg_attr(test, assert_instr(cmgt))]
840840
pub unsafe fn vclez_s32(a: int32x2_t) -> uint32x2_t {
841841
let b: i32x2 = i32x2::new(0, 0);
842842
simd_le(a, transmute(b))
@@ -845,7 +845,7 @@ pub unsafe fn vclez_s32(a: int32x2_t) -> uint32x2_t {
845845
/// Compare signed less than or equal to zero
846846
#[inline]
847847
#[target_feature(enable = "neon")]
848-
#[cfg_attr(test, assert_instr(cmle))]
848+
#[cfg_attr(test, assert_instr(cmgt))]
849849
pub unsafe fn vclezq_s32(a: int32x4_t) -> uint32x4_t {
850850
let b: i32x4 = i32x4::new(0, 0, 0, 0);
851851
simd_le(a, transmute(b))
@@ -854,7 +854,7 @@ pub unsafe fn vclezq_s32(a: int32x4_t) -> uint32x4_t {
854854
/// Compare signed less than or equal to zero
855855
#[inline]
856856
#[target_feature(enable = "neon")]
857-
#[cfg_attr(test, assert_instr(cmle))]
857+
#[cfg_attr(test, assert_instr(cmgt))]
858858
pub unsafe fn vclez_s64(a: int64x1_t) -> uint64x1_t {
859859
let b: i64x1 = i64x1::new(0);
860860
simd_le(a, transmute(b))
@@ -863,7 +863,7 @@ pub unsafe fn vclez_s64(a: int64x1_t) -> uint64x1_t {
863863
/// Compare signed less than or equal to zero
864864
#[inline]
865865
#[target_feature(enable = "neon")]
866-
#[cfg_attr(test, assert_instr(cmle))]
866+
#[cfg_attr(test, assert_instr(cmgt))]
867867
pub unsafe fn vclezq_s64(a: int64x2_t) -> uint64x2_t {
868868
let b: i64x2 = i64x2::new(0, 0);
869869
simd_le(a, transmute(b))
@@ -908,7 +908,7 @@ pub unsafe fn vclezq_f64(a: float64x2_t) -> uint64x2_t {
908908
/// Compare signed less than zero
909909
#[inline]
910910
#[target_feature(enable = "neon")]
911-
#[cfg_attr(test, assert_instr(cmlt))]
911+
#[cfg_attr(test, assert_instr(sshr))]
912912
pub unsafe fn vcltz_s8(a: int8x8_t) -> uint8x8_t {
913913
let b: i8x8 = i8x8::new(7, 7, 7, 7, 7, 7, 7, 7);
914914
let c: int8x8_t = simd_shr(a, transmute(b));
@@ -918,7 +918,7 @@ pub unsafe fn vcltz_s8(a: int8x8_t) -> uint8x8_t {
918918
/// Compare signed less than zero
919919
#[inline]
920920
#[target_feature(enable = "neon")]
921-
#[cfg_attr(test, assert_instr(cmlt))]
921+
#[cfg_attr(test, assert_instr(sshr))]
922922
pub unsafe fn vcltzq_s8(a: int8x16_t) -> uint8x16_t {
923923
let b: i8x16 = i8x16::new(7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7, 7);
924924
let c: int8x16_t = simd_shr(a, transmute(b));
@@ -928,7 +928,7 @@ pub unsafe fn vcltzq_s8(a: int8x16_t) -> uint8x16_t {
928928
/// Compare signed less than zero
929929
#[inline]
930930
#[target_feature(enable = "neon")]
931-
#[cfg_attr(test, assert_instr(cmlt))]
931+
#[cfg_attr(test, assert_instr(sshr))]
932932
pub unsafe fn vcltz_s16(a: int16x4_t) -> uint16x4_t {
933933
let b: i16x4 = i16x4::new(15, 15, 15, 15);
934934
let c: int16x4_t = simd_shr(a, transmute(b));
@@ -938,7 +938,7 @@ pub unsafe fn vcltz_s16(a: int16x4_t) -> uint16x4_t {
938938
/// Compare signed less than zero
939939
#[inline]
940940
#[target_feature(enable = "neon")]
941-
#[cfg_attr(test, assert_instr(cmlt))]
941+
#[cfg_attr(test, assert_instr(sshr))]
942942
pub unsafe fn vcltzq_s16(a: int16x8_t) -> uint16x8_t {
943943
let b: i16x8 = i16x8::new(15, 15, 15, 15, 15, 15, 15, 15);
944944
let c: int16x8_t = simd_shr(a, transmute(b));
@@ -948,7 +948,7 @@ pub unsafe fn vcltzq_s16(a: int16x8_t) -> uint16x8_t {
948948
/// Compare signed less than zero
949949
#[inline]
950950
#[target_feature(enable = "neon")]
951-
#[cfg_attr(test, assert_instr(cmlt))]
951+
#[cfg_attr(test, assert_instr(sshr))]
952952
pub unsafe fn vcltz_s32(a: int32x2_t) -> uint32x2_t {
953953
let b: i32x2 = i32x2::new(31, 31);
954954
let c: int32x2_t = simd_shr(a, transmute(b));
@@ -958,7 +958,7 @@ pub unsafe fn vcltz_s32(a: int32x2_t) -> uint32x2_t {
958958
/// Compare signed less than zero
959959
#[inline]
960960
#[target_feature(enable = "neon")]
961-
#[cfg_attr(test, assert_instr(cmlt))]
961+
#[cfg_attr(test, assert_instr(sshr))]
962962
pub unsafe fn vcltzq_s32(a: int32x4_t) -> uint32x4_t {
963963
let b: i32x4 = i32x4::new(31, 31, 31, 31);
964964
let c: int32x4_t = simd_shr(a, transmute(b));
@@ -968,7 +968,7 @@ pub unsafe fn vcltzq_s32(a: int32x4_t) -> uint32x4_t {
968968
/// Compare signed less than zero
969969
#[inline]
970970
#[target_feature(enable = "neon")]
971-
#[cfg_attr(test, assert_instr(cmlt))]
971+
#[cfg_attr(test, assert_instr(sshr))]
972972
pub unsafe fn vcltz_s64(a: int64x1_t) -> uint64x1_t {
973973
let b: i64x1 = i64x1::new(63);
974974
let c: int64x1_t = simd_shr(a, transmute(b));
@@ -978,7 +978,7 @@ pub unsafe fn vcltz_s64(a: int64x1_t) -> uint64x1_t {
978978
/// Compare signed less than zero
979979
#[inline]
980980
#[target_feature(enable = "neon")]
981-
#[cfg_attr(test, assert_instr(cmlt))]
981+
#[cfg_attr(test, assert_instr(sshr))]
982982
pub unsafe fn vcltzq_s64(a: int64x2_t) -> uint64x2_t {
983983
let b: i64x2 = i64x2::new(63, 63);
984984
let c: int64x2_t = simd_shr(a, transmute(b));

‎crates/stdarch-gen/neon.spec

+2-2
Original file line numberDiff line numberDiff line change
@@ -475,7 +475,7 @@ a = MIN, -1, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0
475475
fixed = 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
476476
validate TRUE, TRUE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
477477

478-
aarch64 = cmle
478+
aarch64 = cmgt
479479
generate int8x8_t:uint8x8_t, int8x16_t:uint8x16_t, int16x4_t:uint16x4_t, int16x8_t:uint16x8_t, int32x2_t:uint32x2_t, int32x4_t:uint32x4_t, int64x1_t:uint64x1_t, int64x2_t:uint64x2_t
480480

481481
/// Floating-point compare less than or equal to zero
@@ -497,7 +497,7 @@ a = MIN, -1, 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, 0x08, 0x09, 0x0A, 0
497497
fixed = BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1, BITS_M1
498498
validate TRUE, TRUE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE, FALSE
499499

500-
aarch64 = cmlt
500+
aarch64 = sshr
501501
generate int8x8_t:uint8x8_t, int8x16_t:uint8x16_t, int16x4_t:uint16x4_t, int16x8_t:uint16x8_t, int32x2_t:uint32x2_t, int32x4_t:uint32x4_t, int64x1_t:uint64x1_t, int64x2_t:uint64x2_t
502502

503503
/// Floating-point compare less than zero

‎crates/stdarch-gen/src/main.rs

+1
Original file line numberDiff line numberDiff line change
@@ -999,6 +999,7 @@ mod test {
999999
let mut file_arm = File::create(arm_out_path.join(ARM_OUT))?;
10001000
file_arm.write_all(out_arm.as_bytes())?;
10011001
file_arm.write_all(tests_arm.as_bytes())?;
1002+
10021003
let aarch64_out_path: PathBuf = PathBuf::from(env::var("OUT_DIR").unwrap())
10031004
.join("src")
10041005
.join("aarch64")

0 commit comments

Comments
 (0)