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sayantnAmanieu
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Updates SDE
Updated SDE to v9.33.0 Disabled `assert-instr` in emulated run
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+25
-25
lines changed

4 files changed

+25
-25
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.github/workflows/main.yml

+1
Original file line numberDiff line numberDiff line change
@@ -115,6 +115,7 @@ jobs:
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os: ubuntu-latest
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test_everything: true
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rustflags: --cfg stdarch_intel_sde
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disable_assert_instr: true
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- target: arm-unknown-linux-gnueabihf
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os: ubuntu-latest
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- target: armv7-unknown-linux-gnueabihf
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@@ -1,14 +1,13 @@
1-
FROM ubuntu:20.04
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FROM ubuntu:24.04
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RUN apt-get update && apt-get install -y --no-install-recommends \
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gcc \
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libc6-dev \
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file \
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make \
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ca-certificates \
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wget \
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bzip2
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xz-utils
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RUN wget https://github.com/gnzlbg/intel_sde/raw/master/sde-external-8.35.0-2019-03-11-lin.tar.bz2
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RUN tar -xjf sde-external-8.35.0-2019-03-11-lin.tar.bz2
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ENV SKIP_TESTS="avx512bf16"
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ENV CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="/sde-external-8.35.0-2019-03-11-lin/sde64 -rtm_mode full --"
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RUN wget https://downloadmirror.intel.com/813591/sde-external-9.33.0-2024-01-07-lin.tar.xz
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RUN tar -xJf sde-external-9.33.0-2024-01-07-lin.tar.xz
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ENV CARGO_TARGET_X86_64_UNKNOWN_LINUX_GNU_RUNNER="/sde-external-9.33.0-2024-01-07-lin/sde64 -future -rtm-mode full -tsx --"

crates/core_arch/src/x86/xsave.rs

-2
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@@ -254,8 +254,6 @@ mod tests {
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}
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*/
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// FIXME: this looks like a bug in Intel's SDE:
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#[cfg(not(stdarch_intel_sde))]
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#[simd_test(enable = "xsave,xsavec")]
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#[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri
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unsafe fn xsavec() {

crates/core_arch/src/x86_64/xsave.rs

+19-17
Original file line numberDiff line numberDiff line change
@@ -126,12 +126,12 @@ pub unsafe fn _xrstors64(mem_addr: *const u8, rs_mask: u64) {
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// FIXME: https://github.com/rust-lang/stdarch/issues/209
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// All these tests fail with Intel SDE.
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/*
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#[cfg(test)]
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mod tests {
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use crate::core_arch::x86::x86_64::xsave;
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use stdarch_test::simd_test;
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use crate::core_arch::x86_64::xsave;
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use std::fmt;
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use stdarch_test::simd_test;
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// FIXME: https://github.com/rust-lang/stdarch/issues/209
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#[repr(align(64))]
@@ -176,6 +176,7 @@ mod tests {
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}
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}
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/*
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#[simd_test(enable = "xsave")]
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#[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri
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unsafe fn xsave64() {
@@ -201,6 +202,7 @@ mod tests {
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xsave::_xsaveopt64(b.ptr(), m);
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assert_eq!(a, b);
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}
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*/
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#[simd_test(enable = "xsave,xsavec")]
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#[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri
@@ -214,18 +216,18 @@ mod tests {
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xsave::_xsavec64(b.ptr(), m);
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assert_eq!(a, b);
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}
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#[simd_test(enable = "xsave,xsaves")]
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#[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri
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unsafe fn xsaves64() {
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let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
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let mut a = XsaveArea::new();
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let mut b = XsaveArea::new();
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xsave::_xsaves64(a.ptr(), m);
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xsave::_xrstors64(a.ptr(), m);
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xsave::_xsaves64(b.ptr(), m);
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assert_eq!(a, b);
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}
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/*
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#[simd_test(enable = "xsave,xsaves")]
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#[cfg_attr(miri, ignore)] // Register saving/restoring is not supported in Miri
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unsafe fn xsaves64() {
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let m = 0xFFFFFFFFFFFFFFFF_u64; //< all registers
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let mut a = XsaveArea::new();
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let mut b = XsaveArea::new();
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xsave::_xsaves64(a.ptr(), m);
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xsave::_xrstors64(a.ptr(), m);
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xsave::_xsaves64(b.ptr(), m);
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assert_eq!(a, b);
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}
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*/
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}
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*/

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