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correct assert_instr
1 parent 4bb6c6c commit 285da9e

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2 files changed

+8
-6
lines changed

2 files changed

+8
-6
lines changed

crates/core_arch/src/arm_shared/neon/generated.rs

+5-5
Original file line numberDiff line numberDiff line change
@@ -6616,7 +6616,7 @@ pub unsafe fn vld1_p64_x2(a: *const p64) -> poly64x1x2_t {
66166616
#[inline]
66176617
#[target_feature(enable = "neon,aes")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
6619-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
6619+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
66206620
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
66216621
pub unsafe fn vld1_p64_x3(a: *const p64) -> poly64x1x3_t {
66226622
transmute(vld1_s64_x3(transmute(a)))
@@ -6626,7 +6626,7 @@ pub unsafe fn vld1_p64_x3(a: *const p64) -> poly64x1x3_t {
66266626
#[inline]
66276627
#[target_feature(enable = "neon,aes")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
6629-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
6629+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
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#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
66316631
pub unsafe fn vld1_p64_x4(a: *const p64) -> poly64x1x4_t {
66326632
transmute(vld1_s64_x4(transmute(a)))
@@ -6636,7 +6636,7 @@ pub unsafe fn vld1_p64_x4(a: *const p64) -> poly64x1x4_t {
66366636
#[inline]
66376637
#[target_feature(enable = "neon,aes")]
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#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
6639-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
6639+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
66406640
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
66416641
pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t {
66426642
transmute(vld1q_s64_x2(transmute(a)))
@@ -6646,7 +6646,7 @@ pub unsafe fn vld1q_p64_x2(a: *const p64) -> poly64x2x2_t {
66466646
#[inline]
66476647
#[target_feature(enable = "neon,aes")]
66486648
#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
6649-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
6649+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
66506650
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
66516651
pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t {
66526652
transmute(vld1q_s64_x3(transmute(a)))
@@ -6656,7 +6656,7 @@ pub unsafe fn vld1q_p64_x3(a: *const p64) -> poly64x2x3_t {
66566656
#[inline]
66576657
#[target_feature(enable = "neon,aes")]
66586658
#[cfg_attr(target_arch = "arm", target_feature(enable = "aes,v8"))]
6659-
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(vld1))]
6659+
#[cfg_attr(all(test, target_arch = "arm"), assert_instr(ldr))]
66606660
#[cfg_attr(all(test, target_arch = "aarch64"), assert_instr(ld1))]
66616661
pub unsafe fn vld1q_p64_x4(a: *const p64) -> poly64x2x4_t {
66626662
transmute(vld1q_s64_x4(transmute(a)))

crates/stdarch-gen/neon.spec

+3-1
Original file line numberDiff line numberDiff line change
@@ -2081,7 +2081,9 @@ generate *const p8:poly8x16x2_t, *const p8:poly8x16x3_t, *const p8:poly8x16x4_t
20812081
generate *const p16:poly16x4x2_t, *const p16:poly16x4x3_t, *const p16:poly16x4x4_t
20822082
generate *const p16:poly16x8x2_t, *const p16:poly16x8x3_t, *const p16:poly16x8x4_t
20832083
target = aes
2084-
generate *const p64:poly64x1x2_t, *const p64:poly64x1x3_t, *const p64:poly64x1x4_t
2084+
generate *const p64:poly64x1x2_t
2085+
arm = ldr
2086+
generate *const p64:poly64x1x3_t, *const p64:poly64x1x4_t
20852087
generate *const p64:poly64x2x2_t, *const p64:poly64x2x3_t, *const p64:poly64x2x4_t
20862088

20872089
/// Load multiple single-element structures to one, two, three, or four registers

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