Merge pull request #2099 from nnethercote/add-stm32f4

Add `stm32f4-0.15.1` benchmark

Author: Kobzol

collector/compile-benchmarks/REUSE.toml

@@ -235,6 +235,11 @@ path = "stm32f4-0.14.0/**"
 SPDX-FileCopyrightText = "stm32-rs contributors"
 SPDX-License-Identifier = "MIT OR Apache-2.0"
 
+[[annotations]]
+path = "stm32f4-0.15.1/**"
+SPDX-FileCopyrightText = "stm32-rs contributors"
+SPDX-License-Identifier = "MIT OR Apache-2.0"
+
 [[annotations]]
 path = "style-servo/**"
 SPDX-FileCopyrightText = "The Servo Project Developers"

collector/compile-benchmarks/stm32f4-0.15.1/0-negate.patch

@@ -0,0 +1,13 @@
+diff --git a/src/generic.rs b/src/generic.rs
+index d46b44a3..a2233c8c 100644
+--- a/src/generic.rs
++++ b/src/generic.rs
+@@ -316,7 +316,7 @@ impl<FI> BitReader<FI> {
+     /// Returns `true` if the bit is set (1).
+     #[inline(always)]
+     pub fn bit_is_set(&self) -> bool {
+-        self.bit()
++        !self.bit()
+     }
+ }
+ 

collector/compile-benchmarks/stm32f4-0.15.1/Cargo.lock

@@ -0,0 +1,74 @@
+# THIS FILE IS AUTOMATICALLY GENERATED BY CARGO
+#
+# When uploading crates to the registry Cargo will automatically
+# "normalize" Cargo.toml files for maximal compatibility
+# with all versions of Cargo and also rewrite `path` dependencies
+# to registry (e.g., crates.io) dependencies.
+#
+# If you are reading this file be aware that the original Cargo.toml
+# will likely look very different (and much more reasonable).
+# See Cargo.toml.orig for the original contents.
+
+[package]
+edition = "2018"
+name = "stm32f4"
+version = "0.15.1"
+authors = [
+    "Adam Greig <[email protected]>",
+    "stm32-rs Contributors",
+]
+description = "Device support crates for STM32F4 devices"
+readme = "README.md"
+keywords = [
+    "stm32",
+    "svd2rust",
+    "no_std",
+    "embedded",
+]
+categories = [
+    "embedded",
+    "no-std",
+]
+license = "MIT/Apache-2.0"
+repository = "https://github.com/stm32-rs/stm32-rs"
+
+[package.metadata.docs.rs]
+features = [
+    "rt",
+    "stm32f401",
+    "stm32f407",
+    "stm32f413",
+    "stm32f469",
+]
+default-target = "thumbv7em-none-eabihf"
+targets = []
+
+[dependencies.bare-metal]
+version = "1.0.0"
+
+[dependencies.cortex-m]
+version = "0.7.2"
+
+[dependencies.cortex-m-rt]
+version = ">=0.6.15,<0.8"
+optional = true
+
+[dependencies.vcell]
+version = "0.1.3"
+
+[features]
+default = ["rt"]
+rt = ["cortex-m-rt/device"]
+stm32f401 = []
+stm32f405 = []
+stm32f407 = []
+stm32f410 = []
+stm32f411 = []
+stm32f412 = []
+stm32f413 = []
+stm32f427 = []
+stm32f429 = []
+stm32f446 = []
+stm32f469 = []
+
+[workspace]

collector/compile-benchmarks/stm32f4-0.15.1/Cargo.toml

@@ -0,0 +1,52 @@
+# stm32f4
+This crate provides an autogenerated API for access to STM32F4 peripherals.
+The API is generated using [svd2rust] with patched svd files containing
+extensive type-safe support. For more information please see the [main repo].
+
+Refer to the [documentation] for full details.
+
+[svd2rust]: https://github.com/rust-embedded/svd2rust
+[main repo]: https://github.com/stm32-rs/stm32-rs
+[documentation]: https://docs.rs/stm32f4/latest/stm32f4/
+
+## Usage
+Each device supported by this crate is behind a feature gate so that you only
+compile the device(s) you want. To use, in your Cargo.toml:
+
+```toml
+[dependencies.stm32f4]
+version = "0.15.1"
+features = ["stm32f401"]
+```
+
+The `rt` feature is enabled by default and brings in support for `cortex-m-rt`.
+To disable, specify `default-features = false` in `Cargo.toml`.
+
+In your code:
+
+```rust
+use stm32f4::stm32f401;
+
+let mut peripherals = stm32f401::Peripherals::take().unwrap();
+let gpioa = &peripherals.GPIOA;
+gpioa.odr.modify(|_, w| w.odr0().set_bit());
+```
+
+For full details on the autogenerated API, please see:
+https://docs.rs/svd2rust/0.24.1/svd2rust/#peripheral-api
+
+## Supported Devices
+
+| Module | Devices | Links |
+|:------:|:-------:|:-----:|
+| stm32f401 | STM32F401 | [RM0368](https://www.st.com/resource/en/reference_manual/dm00096844.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f401.html) |
+| stm32f405 | STM32F405, STM32F415 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f405-415.html) |
+| stm32f407 | STM32F407, STM32F417 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f407-417.html) |
+| stm32f410 | STM32F410 | [RM0401](https://www.st.com/resource/en/reference_manual/dm00180366.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f410.html) |
+| stm32f411 | STM32F411 | [RM0383](https://www.st.com/resource/en/reference_manual/dm00119316.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f411.html) |
+| stm32f412 | STM32F412 | [RM0402](https://www.st.com/resource/en/reference_manual/dm00180369.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f412.html) |
+| stm32f413 | STM32F413, STM32F423 | [RM0430](https://www.st.com/resource/en/reference_manual/dm00305666.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f413-423.html) |
+| stm32f427 | STM32F427, STM32F437 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f427-437.html) |
+| stm32f429 | STM32F429, STM32F439 | [RM0090](https://www.st.com/resource/en/reference_manual/dm00031020.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f429-439.html) |
+| stm32f446 | STM32F446 | [RM0390](https://www.st.com/resource/en/reference_manual/dm00135183.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f446.html) |
+| stm32f469 | STM32F469, STM32F479 | [RM0386](https://www.st.com/resource/en/reference_manual/dm00127514.pdf), [st.com](https://www.st.com/en/microcontrollers-microprocessors/stm32f469-479.html) |