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tesujitesuji
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gvn: const promote arrays of any sizes
1 parent 96b505e commit 604a338

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6 files changed

+32
-42
lines changed

6 files changed

+32
-42
lines changed

‎compiler/rustc_mir_transform/src/gvn.rs

-9
Original file line numberDiff line numberDiff line change
@@ -366,12 +366,6 @@ impl<'body, 'tcx> VnState<'body, 'tcx> {
366366
#[instrument(level = "trace", skip(self), ret)]
367367
fn eval_to_const(&mut self, value: VnIndex) -> Option<OpTy<'tcx>> {
368368
use Value::*;
369-
// LLVM optimizes the load of `sizeof(size_t) * 2` as a single `mov`,
370-
// which is cheap. Bigger values make more `mov` instructions generated.
371-
// After GVN, it became a single load (`lea`) of an address in `.rodata`.
372-
// But to avoid blessing differences between 32-bit and 64-bit target,
373-
// let's choose `size_t = u64`.
374-
const STACK_THRESHOLD: u64 = std::mem::size_of::<u64>() as u64 * 2;
375369
let op = match *self.get(value) {
376370
Opaque(_) => return None,
377371
// Do not bother evaluating repeat expressions. This would uselessly consume memory.
@@ -423,9 +417,6 @@ impl<'body, 'tcx> VnState<'body, 'tcx> {
423417
let ptr_imm = Immediate::new_pointer_with_meta(data, meta, &self.ecx);
424418
ImmTy::from_immediate(ptr_imm, ty).into()
425419
} else if matches!(kind, AggregateTy::Array) {
426-
if ty.layout.size().bytes() <= STACK_THRESHOLD {
427-
return None;
428-
}
429420
let dest = self.ecx.allocate(ty, MemoryKind::Stack).ok()?;
430421
// FIXME: Can we speed it up by using `ecx.write_immediate(.ScalarPair(_), dest)`?
431422
for (field_index, op) in fields.iter().copied().enumerate() {

‎tests/mir-opt/const_array_locals.main.GVN.diff

+19-28
Original file line numberDiff line numberDiff line change
@@ -78,11 +78,14 @@
7878
StorageDead(_12);
7979
StorageLive(_13);
8080
StorageLive(_14);
81-
_14 = [const 1_i32, const 0_i32, const 0_i32];
81+
- _14 = [const 1_i32, const 0_i32, const 0_i32];
82+
+ _14 = const [1_i32, 0_i32, 0_i32];
8283
StorageLive(_15);
83-
_15 = [const 0_i32, const 1_i32, const 0_i32];
84+
- _15 = [const 0_i32, const 1_i32, const 0_i32];
85+
+ _15 = const [0_i32, 1_i32, 0_i32];
8486
StorageLive(_16);
85-
_16 = [const 0_i32, const 0_i32, const 1_i32];
87+
- _16 = [const 0_i32, const 0_i32, const 1_i32];
88+
+ _16 = const [0_i32, 0_i32, 1_i32];
8689
_13 = [move _14, move _15, move _16];
8790
StorageDead(_16);
8891
StorageDead(_15);
@@ -96,35 +99,23 @@
9699
StorageDead(_1);
97100
return;
98101
}
99-
+ }
102+
}
100103
+
101-
+ ALLOC0 (size: 32, align: 4) {
102-
+ 0x00 │ 00 00 80 3f 00 00 00 40 00 00 40 40 00 00 80 3f │ ...?...@..@@...?
103-
+ 0x10 │ 00 00 80 3f 00 00 80 3f 00 00 80 3f 00 00 28 42 │ ...?...?...?..(B
104-
+ }
104+
+ ALLOC0 (size: 12, align: 4) { .. }
105105
+
106-
+ ALLOC1 (size: 20, align: 4) {
107-
+ 0x00 │ 1f 00 00 00 60 00 00 00 ad 00 00 00 32 00 00 00 │ ....`.......2...
108-
+ 0x10 │ 01 00 00 00 │ ....
109-
+ }
106+
+ ALLOC1 (size: 12, align: 4) { .. }
110107
+
111-
+ ALLOC2 (size: 20, align: 4) {
112-
+ 0x00 │ c1 00 00 00 a4 00 00 00 c2 00 00 00 c5 00 00 00 │ ................
113-
+ 0x10 │ 06 00 00 00 │ ....
114-
+ }
108+
+ ALLOC2 (size: 12, align: 4) { .. }
115109
+
116-
+ ALLOC3 (size: 20, align: 4) {
117-
+ 0x00 │ b2 00 00 00 09 00 00 00 04 00 00 00 38 00 00 00 │ ............8...
118-
+ 0x10 │ dd 00 00 00 │ ....
119-
+ }
110+
+ ALLOC3 (size: 32, align: 4) { .. }
120111
+
121-
+ ALLOC4 (size: 20, align: 4) {
122-
+ 0x00 │ ff 00 00 00 69 00 00 00 0f 00 00 00 27 00 00 00 │ ....i.......'...
123-
+ 0x10 │ 3e 00 00 00 │ >...
124-
+ }
112+
+ ALLOC4 (size: 20, align: 4) { .. }
125113
+
126-
+ ALLOC5 (size: 20, align: 4) {
127-
+ 0x00 │ fe 00 00 00 2a 00 00 00 0f 00 00 00 27 00 00 00 │ ....*.......'...
128-
+ 0x10 │ 3e 00 00 00 │ >...
129-
}
114+
+ ALLOC5 (size: 20, align: 4) { .. }
115+
+
116+
+ ALLOC6 (size: 20, align: 4) { .. }
117+
+
118+
+ ALLOC7 (size: 20, align: 4) { .. }
119+
+
120+
+ ALLOC8 (size: 20, align: 4) { .. }
130121

‎tests/mir-opt/const_array_locals.rs

+4-3
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
//@ test-mir-pass: GVN
2+
//@ compile-flags: -Zdump-mir-exclude-alloc-bytes
23
#![feature(repr_simd)]
34

45
#[repr(simd)]
@@ -33,9 +34,9 @@ pub fn main() {
3334
let _f = F32x8([1.0, 2.0, 3.0, 1.0, 1.0, 1.0, 1.0, 42.0]);
3435

3536
// ice with small arrays
36-
// CHECK: [[A:_[0-9]+]] = [const 1_i32, const 0_i32, const 0_i32];
37-
// CHECK: [[B:_[0-9]+]] = [const 0_i32, const 1_i32, const 0_i32];
38-
// CHECK: [[C:_[0-9]+]] = [const 0_i32, const 0_i32, const 1_i32];
37+
// CHECK: [[A:_[0-9]+]] = const [1_i32, 0_i32, 0_i32];
38+
// CHECK: [[B:_[0-9]+]] = const [0_i32, 1_i32, 0_i32];
39+
// CHECK: [[C:_[0-9]+]] = const [0_i32, 0_i32, 1_i32];
3940
// CHECK: {{_[0-9]+}} = [move [[A]], move [[B]], move [[C]]];
4041
[[1, 0, 0], [0, 1, 0], [0, 0, 1]]; // 2D array
4142
}

‎tests/mir-opt/const_prop/array_index.main.GVN.32bit.panic-unwind.diff

+4-1
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,8 @@
1515
bb0: {
1616
StorageLive(_1);
1717
StorageLive(_2);
18-
_2 = [const 0_u32, const 1_u32, const 2_u32, const 3_u32];
18+
- _2 = [const 0_u32, const 1_u32, const 2_u32, const 3_u32];
19+
+ _2 = const [0_u32, 1_u32, 2_u32, 3_u32];
1920
StorageLive(_3);
2021
_3 = const 2_usize;
2122
- _4 = Len(_2);
@@ -36,4 +37,6 @@
3637
return;
3738
}
3839
}
40+
+
41+
+ ALLOC0 (size: 16, align: 4) { .. }
3942

‎tests/mir-opt/const_prop/array_index.main.GVN.64bit.panic-unwind.diff

+4-1
Original file line numberDiff line numberDiff line change
@@ -15,7 +15,8 @@
1515
bb0: {
1616
StorageLive(_1);
1717
StorageLive(_2);
18-
_2 = [const 0_u32, const 1_u32, const 2_u32, const 3_u32];
18+
- _2 = [const 0_u32, const 1_u32, const 2_u32, const 3_u32];
19+
+ _2 = const [0_u32, 1_u32, 2_u32, 3_u32];
1920
StorageLive(_3);
2021
_3 = const 2_usize;
2122
- _4 = Len(_2);
@@ -36,4 +37,6 @@
3637
return;
3738
}
3839
}
40+
+
41+
+ ALLOC0 (size: 16, align: 4) { .. }
3942

‎tests/mir-opt/const_prop/array_index.rs

+1
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
//@ test-mir-pass: GVN
2+
//@ compile-flags: -Zdump-mir-exclude-alloc-bytes
23
// EMIT_MIR_FOR_EACH_PANIC_STRATEGY
34
// EMIT_MIR_FOR_EACH_BIT_WIDTH
45

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