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Add is_riscv_feature_detected!; modify impl of hint::spin_loop
Update library/core/src/hint.rs Co-authored-by: Amanieu d'Antras <[email protected]> Remove redundant config gate
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library/core/src/hint.rs

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@@ -123,6 +123,21 @@ pub fn spin_loop() {
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}
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}
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// RISC-V platform spin loop hint implementation
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{
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// RISC-V RV32 and RV64 share the same PAUSE instruction, but they are located in different
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// modules in `core::arch`.
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// In this case, here we call `pause` function in each core arch module.
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#[cfg(target_arch = "riscv32")]
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{
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crate::arch::riscv32::pause();
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}
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#[cfg(target_arch = "riscv64")]
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{
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crate::arch::riscv64::pause();
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}
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}
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#[cfg(any(target_arch = "aarch64", all(target_arch = "arm", target_feature = "v6")))]
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{
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#[cfg(target_arch = "aarch64")]
@@ -137,11 +152,6 @@ pub fn spin_loop() {
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unsafe { crate::arch::arm::__yield() };
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}
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}
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#[cfg(any(target_arch = "riscv32", target_arch = "riscv64"))]
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{
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crate::arch::riscv::pause();
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}
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}
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/// An identity function that *__hints__* to the compiler to be maximally pessimistic about what

library/std/src/lib.rs

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@@ -556,6 +556,7 @@ pub use std_detect::*;
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pub use std_detect::{
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is_aarch64_feature_detected, is_arm_feature_detected, is_mips64_feature_detected,
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is_mips_feature_detected, is_powerpc64_feature_detected, is_powerpc_feature_detected,
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is_riscv_feature_detected,
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};
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// Re-export macros defined in libcore.

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