@@ -405,7 +405,7 @@ where
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mut enable : Mask < <T as SimdElement >:: Mask , N > ,
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or : Self ,
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) -> Self {
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- enable &= mask_up_to ( enable , slice. len ( ) ) ;
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+ enable &= mask_up_to ( slice. len ( ) ) ;
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// SAFETY: We performed the bounds check by updating the mask. &[T] is properly aligned to
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// the element.
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unsafe { Self :: load_select_ptr ( slice. as_ptr ( ) , enable, or) }
@@ -624,7 +624,7 @@ where
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#[ inline]
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pub fn masked_store ( self , slice : & mut [ T ] , mut enable : Mask < <T as SimdElement >:: Mask , N > ) {
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- enable &= mask_up_to ( enable , slice. len ( ) ) ;
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+ enable &= mask_up_to ( slice. len ( ) ) ;
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// SAFETY: We performed the bounds check by updating the mask. &[T] is properly aligned to
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// the element.
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unsafe { self . masked_store_ptr ( slice. as_mut_ptr ( ) , enable) }
@@ -1149,12 +1149,12 @@ where
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}
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#[ inline]
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- fn mask_up_to < M , const N : usize > ( enable : Mask < M , N > , len : usize ) -> Mask < M , N >
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+ fn mask_up_to < M , const N : usize > ( len : usize ) -> Mask < M , N >
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where
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LaneCount < N > : SupportedLaneCount ,
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M : MaskElement ,
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{
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let index = lane_indices :: < i8 , N > ( ) ;
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let lt = index. simd_lt ( Simd :: splat ( i8:: try_from ( len) . unwrap_or ( i8:: MAX ) ) ) ;
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- enable & Mask :: < M , N > :: from_bitmask_vector ( lt. to_bitmask_vector ( ) )
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+ Mask :: < M , N > :: from_bitmask_vector ( lt. to_bitmask_vector ( ) )
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}
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