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alexcrichtonarielb1
alexcrichton
authored and
arielb1
committed
Merge pull request #87 from pftbest/msp430_layout
[MSP430] Merge bug fixes from llvm upstream.
2 parents 4173c1f + ae7bdef commit 184599f

14 files changed

+130
-32
lines changed

‎lib/Target/MSP430/MSP430.td

Lines changed: 14 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -22,13 +22,27 @@ def FeatureX
2222
: SubtargetFeature<"ext", "ExtendedInsts", "true",
2323
"Enable MSP430-X extensions">;
2424

25+
def FeatureHWMult16
26+
: SubtargetFeature<"hwmult16", "HWMultMode", "HWMult16",
27+
"Enable 16-bit hardware multiplier">;
28+
29+
def FeatureHWMult32
30+
: SubtargetFeature<"hwmult32", "HWMultMode", "HWMult32",
31+
"Enable 32-bit hardware multiplier">;
32+
33+
def FeatureHWMultF5
34+
: SubtargetFeature<"hwmultf5", "HWMultMode", "HWMultF5",
35+
"Enable F5 series hardware multiplier">;
36+
2537
//===----------------------------------------------------------------------===//
2638
// MSP430 supported processors.
2739
//===----------------------------------------------------------------------===//
2840
class Proc<string Name, list<SubtargetFeature> Features>
2941
: Processor<Name, NoItineraries, Features>;
3042

3143
def : Proc<"generic", []>;
44+
def : Proc<"msp430", []>;
45+
def : Proc<"msp430x", [FeatureX]>;
3246

3347
//===----------------------------------------------------------------------===//
3448
// Register File Description

‎lib/Target/MSP430/MSP430ISelDAGToDAG.cpp

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -401,12 +401,12 @@ void MSP430DAGToDAGISel::Select(SDNode *Node) {
401401
int FI = cast<FrameIndexSDNode>(Node)->getIndex();
402402
SDValue TFI = CurDAG->getTargetFrameIndex(FI, MVT::i16);
403403
if (Node->hasOneUse()) {
404-
CurDAG->SelectNodeTo(Node, MSP430::ADD16ri, MVT::i16, TFI,
404+
CurDAG->SelectNodeTo(Node, MSP430::ADDframe, MVT::i16, TFI,
405405
CurDAG->getTargetConstant(0, dl, MVT::i16));
406406
return;
407407
}
408408
ReplaceNode(Node, CurDAG->getMachineNode(
409-
MSP430::ADD16ri, dl, MVT::i16, TFI,
409+
MSP430::ADDframe, dl, MVT::i16, TFI,
410410
CurDAG->getTargetConstant(0, dl, MVT::i16)));
411411
return;
412412
}

‎lib/Target/MSP430/MSP430ISelLowering.cpp

Lines changed: 3 additions & 24 deletions
Original file line numberDiff line numberDiff line change
@@ -38,27 +38,6 @@ using namespace llvm;
3838

3939
#define DEBUG_TYPE "msp430-lower"
4040

41-
typedef enum {
42-
NoHWMult,
43-
HWMult16,
44-
HWMult32,
45-
HWMultF5
46-
} HWMultUseMode;
47-
48-
static cl::opt<HWMultUseMode>
49-
HWMultMode("mhwmult", cl::Hidden,
50-
cl::desc("Hardware multiplier use mode"),
51-
cl::init(NoHWMult),
52-
cl::values(
53-
clEnumValN(NoHWMult, "none",
54-
"Do not use hardware multiplier"),
55-
clEnumValN(HWMult16, "16bit",
56-
"Use 16-bit hardware multiplier"),
57-
clEnumValN(HWMult32, "32bit",
58-
"Use 32-bit hardware multiplier"),
59-
clEnumValN(HWMultF5, "f5series",
60-
"Use F5 series hardware multiplier")));
61-
6241
MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM,
6342
const MSP430Subtarget &STI)
6443
: TargetLowering(TM) {
@@ -262,7 +241,7 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM,
262241
setCmpLibcallCC(LC.Op, LC.Cond);
263242
}
264243

265-
if (HWMultMode == HWMult16) {
244+
if (STI.hasHWMult16()) {
266245
const struct {
267246
const RTLIB::Libcall Op;
268247
const char * const Name;
@@ -277,7 +256,7 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM,
277256
for (const auto &LC : LibraryCalls) {
278257
setLibcallName(LC.Op, LC.Name);
279258
}
280-
} else if (HWMultMode == HWMult32) {
259+
} else if (STI.hasHWMult32()) {
281260
const struct {
282261
const RTLIB::Libcall Op;
283262
const char * const Name;
@@ -292,7 +271,7 @@ MSP430TargetLowering::MSP430TargetLowering(const TargetMachine &TM,
292271
for (const auto &LC : LibraryCalls) {
293272
setLibcallName(LC.Op, LC.Name);
294273
}
295-
} else if (HWMultMode == HWMultF5) {
274+
} else if (STI.hasHWMultF5()) {
296275
const struct {
297276
const RTLIB::Libcall Op;
298277
const char * const Name;

‎lib/Target/MSP430/MSP430InstrInfo.td

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -121,6 +121,11 @@ def ADJCALLSTACKUP : Pseudo<(outs), (ins i16imm:$amt1, i16imm:$amt2),
121121
[(MSP430callseq_end timm:$amt1, timm:$amt2)]>;
122122
}
123123

124+
let Defs = [SR], Uses = [SP] in {
125+
def ADDframe : Pseudo<(outs GR16:$dst), (ins i16imm:$base, i16imm:$offset),
126+
"# ADDframe PSEUDO", []>;
127+
}
128+
124129
let usesCustomInserter = 1 in {
125130
let Uses = [SR] in {
126131
def Select8 : Pseudo<(outs GR8:$dst), (ins GR8:$src, GR8:$src2, i8imm:$cc),

‎lib/Target/MSP430/MSP430RegisterInfo.cpp

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -127,7 +127,7 @@ MSP430RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
127127
// Fold imm into offset
128128
Offset += MI.getOperand(FIOperandNum + 1).getImm();
129129

130-
if (MI.getOpcode() == MSP430::ADD16ri) {
130+
if (MI.getOpcode() == MSP430::ADDframe) {
131131
// This is actually "load effective address" of the stack slot
132132
// instruction. We have only two-address instructions, thus we need to
133133
// expand it into mov + add

‎lib/Target/MSP430/MSP430Subtarget.cpp

Lines changed: 26 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -19,6 +19,20 @@ using namespace llvm;
1919

2020
#define DEBUG_TYPE "msp430-subtarget"
2121

22+
static cl::opt<MSP430Subtarget::HWMultEnum>
23+
HWMultModeOption("mhwmult", cl::Hidden,
24+
cl::desc("Hardware multiplier use mode for MSP430"),
25+
cl::init(MSP430Subtarget::NoHWMult),
26+
cl::values(
27+
clEnumValN(MSP430Subtarget::NoHWMult, "none",
28+
"Do not use hardware multiplier"),
29+
clEnumValN(MSP430Subtarget::HWMult16, "16bit",
30+
"Use 16-bit hardware multiplier"),
31+
clEnumValN(MSP430Subtarget::HWMult32, "32bit",
32+
"Use 32-bit hardware multiplier"),
33+
clEnumValN(MSP430Subtarget::HWMultF5, "f5series",
34+
"Use F5 series hardware multiplier")));
35+
2236
#define GET_SUBTARGETINFO_TARGET_DESC
2337
#define GET_SUBTARGETINFO_CTOR
2438
#include "MSP430GenSubtargetInfo.inc"
@@ -27,7 +41,18 @@ void MSP430Subtarget::anchor() { }
2741

2842
MSP430Subtarget &
2943
MSP430Subtarget::initializeSubtargetDependencies(StringRef CPU, StringRef FS) {
30-
ParseSubtargetFeatures("generic", FS);
44+
ExtendedInsts = false;
45+
HWMultMode = NoHWMult;
46+
47+
std::string CPUName = CPU;
48+
if (CPUName.empty())
49+
CPUName = "msp430";
50+
51+
ParseSubtargetFeatures(CPUName, FS);
52+
53+
if (HWMultModeOption != NoHWMult)
54+
HWMultMode = HWMultModeOption;
55+
3156
return *this;
3257
}
3358

‎lib/Target/MSP430/MSP430Subtarget.h

Lines changed: 11 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -30,8 +30,15 @@ namespace llvm {
3030
class StringRef;
3131

3232
class MSP430Subtarget : public MSP430GenSubtargetInfo {
33+
public:
34+
enum HWMultEnum {
35+
NoHWMult, HWMult16, HWMult32, HWMultF5
36+
};
37+
38+
private:
3339
virtual void anchor();
3440
bool ExtendedInsts;
41+
HWMultEnum HWMultMode;
3542
MSP430FrameLowering FrameLowering;
3643
MSP430InstrInfo InstrInfo;
3744
MSP430TargetLowering TLInfo;
@@ -50,6 +57,10 @@ class MSP430Subtarget : public MSP430GenSubtargetInfo {
5057
/// subtarget options. Definition of function is auto generated by tblgen.
5158
void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
5259

60+
bool hasHWMult16() const { return HWMultMode == HWMult16; }
61+
bool hasHWMult32() const { return HWMultMode == HWMult32; }
62+
bool hasHWMultF5() const { return HWMultMode == HWMultF5; }
63+
5364
const TargetFrameLowering *getFrameLowering() const override {
5465
return &FrameLowering;
5566
}

‎lib/Target/MSP430/MSP430TargetMachine.cpp

Lines changed: 6 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -32,16 +32,20 @@ static Reloc::Model getEffectiveRelocModel(Optional<Reloc::Model> RM) {
3232
return *RM;
3333
}
3434

35+
static std::string computeDataLayout(const Triple &TT, StringRef CPU,
36+
const TargetOptions &Options) {
37+
return "e-m:e-p:16:16-i32:16-i64:16-f32:16-f64:16-a:8-n8:16-S16";
38+
}
39+
3540
MSP430TargetMachine::MSP430TargetMachine(const Target &T, const Triple &TT,
3641
StringRef CPU, StringRef FS,
3742
const TargetOptions &Options,
3843
Optional<Reloc::Model> RM,
3944
CodeModel::Model CM,
4045
CodeGenOpt::Level OL)
41-
: LLVMTargetMachine(T, "e-m:e-p:16:16-i32:16:32-a:16-n8:16", TT, CPU, FS,
46+
: LLVMTargetMachine(T, computeDataLayout(TT, CPU, Options), TT, CPU, FS,
4247
Options, getEffectiveRelocModel(RM), CM, OL),
4348
TLOF(make_unique<TargetLoweringObjectFileELF>()),
44-
// FIXME: Check DataLayout string.
4549
Subtarget(TT, CPU, FS, *this) {
4650
initAsmInfo();
4751
}

‎test/CodeGen/MSP430/Inst16mm.ll

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -64,6 +64,6 @@ entry:
6464
%0 = load i16, i16* %retval ; <i16> [#uses=1]
6565
ret i16 %0
6666
; CHECK-LABEL: mov2:
67-
; CHECK: mov.w 2(r1), 6(r1)
6867
; CHECK: mov.w 0(r1), 4(r1)
68+
; CHECK: mov.w 2(r1), 6(r1)
6969
}

‎test/CodeGen/MSP430/hwmult16.ll

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,4 +1,5 @@
11
; RUN: llc -O0 -mhwmult=16bit < %s | FileCheck %s
2+
; RUN: llc -O0 -mattr=+hwmult16 < %s | FileCheck %s
23

34
target datalayout = "e-p:16:16:16-i8:8:8-i16:16:16-i32:16:32-n8:16-a0:16:16"
45
target triple = "msp430---elf"

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