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1 |
| -use core::arch::aarch64::{ |
2 |
| - float32x2_t, float64x1_t, vdup_n_f32, vdup_n_f64, vget_lane_f32, vget_lane_f64, vrndn_f32, |
3 |
| - vrndn_f64, |
4 |
| -}; |
| 1 | +//! Architecture-specific support for aarch64 with neon. |
5 | 2 |
|
6 |
| -pub fn rint(x: f64) -> f64 { |
7 |
| - // SAFETY: only requires target_feature=neon, ensured by `cfg_if` in parent module. |
8 |
| - let x_vec: float64x1_t = unsafe { vdup_n_f64(x) }; |
| 3 | +use core::arch::asm; |
9 | 4 |
|
10 |
| - // SAFETY: only requires target_feature=neon, ensured by `cfg_if` in parent module. |
11 |
| - let result_vec: float64x1_t = unsafe { vrndn_f64(x_vec) }; |
| 5 | +pub fn fma(mut x: f64, y: f64, z: f64) -> f64 { |
| 6 | + unsafe { |
| 7 | + asm!( |
| 8 | + "fmadd {x:d}, {x:d}, {y:d}, {z:d}", |
| 9 | + x = inout(vreg) x, |
| 10 | + y = in(vreg) y, |
| 11 | + z = in(vreg) z, |
| 12 | + options(nomem, nostack, pure) |
| 13 | + ); |
| 14 | + } |
| 15 | + x |
| 16 | +} |
12 | 17 |
|
13 |
| - // SAFETY: only requires target_feature=neon, ensured by `cfg_if` in parent module. |
14 |
| - let result: f64 = unsafe { vget_lane_f64::<0>(result_vec) }; |
| 18 | +pub fn fmaf(mut x: f32, y: f32, z: f32) -> f32 { |
| 19 | + unsafe { |
| 20 | + asm!( |
| 21 | + "fmadd {x:s}, {x:s}, {y:s}, {z:s}", |
| 22 | + x = inout(vreg) x, |
| 23 | + y = in(vreg) y, |
| 24 | + z = in(vreg) z, |
| 25 | + options(nomem, nostack, pure) |
| 26 | + ); |
| 27 | + } |
| 28 | + x |
| 29 | +} |
15 | 30 |
|
16 |
| - result |
| 31 | +pub fn rint(mut x: f64) -> f64 { |
| 32 | + unsafe { |
| 33 | + asm!( |
| 34 | + "frinti {x:d}, {x:d}", |
| 35 | + x = inout(vreg) x, |
| 36 | + options(nomem, nostack, pure) |
| 37 | + ); |
| 38 | + } |
| 39 | + x |
17 | 40 | }
|
18 | 41 |
|
19 |
| -pub fn rintf(x: f32) -> f32 { |
20 |
| - // There's a scalar form of this instruction (FRINTN) but core::arch doesn't expose it, so we |
21 |
| - // have to use the vector form and drop the other lanes afterwards. |
| 42 | +pub fn rintf(mut x: f32) -> f32 { |
| 43 | + unsafe { |
| 44 | + asm!( |
| 45 | + "frinti {x:s}, {x:s}", |
| 46 | + x = inout(vreg) x, |
| 47 | + options(nomem, nostack, pure) |
| 48 | + ); |
| 49 | + } |
| 50 | + x |
| 51 | +} |
22 | 52 |
|
23 |
| - // SAFETY: only requires target_feature=neon, ensured by `cfg_if` in parent module. |
24 |
| - let x_vec: float32x2_t = unsafe { vdup_n_f32(x) }; |
| 53 | +#[cfg(all(f16_enabled, target_feature = "fp16"))] |
| 54 | +pub fn rintf16(mut x: f16) -> f16 { |
| 55 | + unsafe { |
| 56 | + asm!( |
| 57 | + "frinti {x:h}, {x:h}", |
| 58 | + x = inout(vreg) x, |
| 59 | + options(nomem, nostack, pure) |
| 60 | + ); |
| 61 | + } |
| 62 | + x |
| 63 | +} |
25 | 64 |
|
26 |
| - // SAFETY: only requires target_feature=neon, ensured by `cfg_if` in parent module. |
27 |
| - let result_vec: float32x2_t = unsafe { vrndn_f32(x_vec) }; |
| 65 | +pub fn sqrt(mut x: f64) -> f64 { |
| 66 | + unsafe { |
| 67 | + asm!( |
| 68 | + "fsqrt {x:d}, {x:d}", |
| 69 | + x = inout(vreg) x, |
| 70 | + options(nomem, nostack, pure) |
| 71 | + ); |
| 72 | + } |
| 73 | + x |
| 74 | +} |
28 | 75 |
|
29 |
| - // SAFETY: only requires target_feature=neon, ensured by `cfg_if` in parent module. |
30 |
| - let result: f32 = unsafe { vget_lane_f32::<0>(result_vec) }; |
| 76 | +pub fn sqrtf(mut x: f32) -> f32 { |
| 77 | + unsafe { |
| 78 | + asm!( |
| 79 | + "fsqrt {x:s}, {x:s}", |
| 80 | + x = inout(vreg) x, |
| 81 | + options(nomem, nostack, pure) |
| 82 | + ); |
| 83 | + } |
| 84 | + x |
| 85 | +} |
31 | 86 |
|
32 |
| - result |
| 87 | +#[cfg(all(f16_enabled, target_feature = "fp16"))] |
| 88 | +pub fn sqrtf16(mut x: f16) -> f16 { |
| 89 | + unsafe { |
| 90 | + asm!( |
| 91 | + "fsqrt {x:h}, {x:h}", |
| 92 | + x = inout(vreg) x, |
| 93 | + options(nomem, nostack, pure) |
| 94 | + ); |
| 95 | + } |
| 96 | + x |
33 | 97 | }
|
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