Skip to content

Commit a306607

Browse files
antoyoantoyo
authored
Merge pull request #56 from rust-lang/feature/aarch64-cpu-features
libgccjit: Add support for Aarch64 CPU features
2 parents ac1853f + 974d04c commit a306607

File tree

4 files changed

+178
-0
lines changed

4 files changed

+178
-0
lines changed

‎gcc/config.gcc

+1
Original file line numberDiff line numberDiff line change
@@ -357,6 +357,7 @@ aarch64*-*-*)
357357
c_target_objs="aarch64-c.o"
358358
cxx_target_objs="aarch64-c.o"
359359
d_target_objs="aarch64-d.o"
360+
jit_target_objs="aarch64-jit.o"
360361
extra_objs="aarch64-builtins.o aarch-common.o aarch64-sve-builtins.o aarch64-sve-builtins-shapes.o aarch64-sve-builtins-base.o aarch64-sve-builtins-sve2.o aarch64-sve-builtins-sme.o cortex-a57-fma-steering.o aarch64-speculation.o falkor-tag-collision-avoidance.o aarch-bti-insert.o aarch64-cc-fusion.o aarch64-early-ra.o aarch64-ldp-fusion.o"
361362
target_gtfiles="\$(srcdir)/config/aarch64/aarch64-builtins.h \$(srcdir)/config/aarch64/aarch64-builtins.cc \$(srcdir)/config/aarch64/aarch64-sve-builtins.h \$(srcdir)/config/aarch64/aarch64-sve-builtins.cc"
362363
target_has_targetm_common=yes

‎gcc/config/aarch64/aarch64-jit.cc

+149
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,149 @@
1+
/* Subroutines for the jit front end on the AArch64 architecture.
2+
Copyright (C) 2024 Free Software Foundation, Inc.
3+
4+
GCC is free software; you can redistribute it and/or modify
5+
it under the terms of the GNU General Public License as published by
6+
the Free Software Foundation; either version 3, or (at your option)
7+
any later version.
8+
9+
GCC is distributed in the hope that it will be useful,
10+
but WITHOUT ANY WARRANTY; without even the implied warranty of
11+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12+
GNU General Public License for more details.
13+
14+
You should have received a copy of the GNU General Public License
15+
along with GCC; see the file COPYING3. If not see
16+
<http://www.gnu.org/licenses/>. */
17+
18+
#define IN_TARGET_CODE 1
19+
20+
#include "config.h"
21+
#include "system.h"
22+
#include "coretypes.h"
23+
#include "tm.h"
24+
#include "tm_jit.h"
25+
#include <sys/auxv.h>
26+
#include "jit/jit-target.h"
27+
#include "jit/jit-target-def.h"
28+
29+
/* Implement TARGET_JIT_CPU_VERSIONS for AArch64 targets. */
30+
31+
void
32+
aarch64_jit_target_versions (void)
33+
{
34+
}
35+
36+
/* Implement TARGET_JIT_REGISTER_CPU_TARGET_INFO. */
37+
38+
void
39+
aarch64_jit_register_target_info (void)
40+
{
41+
#define getCPUFeature(id, ftr) __asm__("mrs %0, " #id : "=r"(ftr))
42+
#define extractBits(val, start, number) \
43+
(val & ((1ULL << number) - 1ULL) << start) >> start
44+
45+
const char *params[] = {"arch"};
46+
const char* local_cpu = host_detect_local_cpu (2, params);
47+
std::string arch = local_cpu;
48+
free (const_cast <char *> (local_cpu));
49+
50+
const char* arg = "-march=";
51+
size_t arg_pos = arch.find (arg) + strlen (arg);
52+
size_t end_pos = arch.find (" ", arg_pos);
53+
54+
std::string cpu = arch.substr (arg_pos, end_pos - arg_pos);
55+
jit_target_set_arch (cpu);
56+
57+
if (TARGET_AES)
58+
jit_add_target_info ("target_feature", "aes");
59+
if (TARGET_BF16_FP)
60+
jit_add_target_info ("target_feature", "bf16");
61+
if (TARGET_BTI)
62+
jit_add_target_info ("target_feature", "bti");
63+
if (TARGET_COMPLEX)
64+
// TODO: check if this is the correct match.
65+
jit_add_target_info ("target_feature", "fcma");
66+
if (TARGET_CRC32)
67+
jit_add_target_info ("target_feature", "crc");
68+
if (TARGET_DOTPROD)
69+
jit_add_target_info ("target_feature", "dotprod");
70+
if (TARGET_SVE_F32MM)
71+
// TODO: check if this is the correct match.
72+
jit_add_target_info ("target_feature", "f32mm");
73+
if (TARGET_SVE_F64MM)
74+
// TODO: check if this is the correct match.
75+
jit_add_target_info ("target_feature", "f64mm");
76+
if (TARGET_F16FML)
77+
// TODO: check if this is the correct match.
78+
jit_add_target_info ("target_feature", "fhm");
79+
if (TARGET_FP_F16INST)
80+
// TODO: check if this is the correct match.
81+
jit_add_target_info ("target_feature", "fp16");
82+
if (TARGET_FRINT)
83+
// TODO: check if this is the correct match.
84+
jit_add_target_info ("target_feature", "frintts");
85+
if (TARGET_I8MM)
86+
jit_add_target_info ("target_feature", "i8mm");
87+
if (TARGET_JSCVT)
88+
// TODO: check if this is the correct match.
89+
jit_add_target_info ("target_feature", "jsconv");
90+
if (TARGET_LSE)
91+
jit_add_target_info ("target_feature", "lse");
92+
if (TARGET_MEMTAG)
93+
// TODO: check if this is the correct match.
94+
jit_add_target_info ("target_feature", "mte");
95+
if (TARGET_PAUTH)
96+
{
97+
jit_add_target_info ("target_feature", "paca");
98+
jit_add_target_info ("target_feature", "pacg");
99+
}
100+
if (TARGET_RNG)
101+
jit_add_target_info ("target_feature", "rand");
102+
if (TARGET_RCPC)
103+
jit_add_target_info ("target_feature", "rcpc");
104+
if (TARGET_RCPC2)
105+
jit_add_target_info ("target_feature", "rcpc2");
106+
if (TARGET_SIMD_RDMA)
107+
// TODO: check if this is the correct match.
108+
jit_add_target_info ("target_feature", "rdm");
109+
if (TARGET_SB)
110+
jit_add_target_info ("target_feature", "sb");
111+
if (TARGET_SHA2)
112+
jit_add_target_info ("target_feature", "sha2");
113+
if (TARGET_SHA3)
114+
jit_add_target_info ("target_feature", "sha3");
115+
if (TARGET_SIMD)
116+
jit_add_target_info ("target_feature", "neon");
117+
if (TARGET_SM4)
118+
jit_add_target_info ("target_feature", "sm4");
119+
if (TARGET_SVE)
120+
jit_add_target_info ("target_feature", "sve");
121+
if (TARGET_SVE2)
122+
jit_add_target_info ("target_feature", "sve2");
123+
if (TARGET_SVE2_AES)
124+
jit_add_target_info ("target_feature", "sve2-aes");
125+
if (TARGET_SVE2_BITPERM)
126+
jit_add_target_info ("target_feature", "sve2-bitperm");
127+
if (TARGET_SVE2_SHA3)
128+
jit_add_target_info ("target_feature", "sve2-sha3");
129+
if (TARGET_SVE2_SM4)
130+
jit_add_target_info ("target_feature", "sve2-sm4");
131+
if (TARGET_TME)
132+
jit_add_target_info ("target_feature", "tme");
133+
// TODO: features dit, dpb, dpb2, flagm, lor, pan, pmuv3, ras, spe, ssbs, vh
134+
135+
if (AARCH64_ISA_V8_1A)
136+
jit_add_target_info ("target_feature", "v8.1a");
137+
if (AARCH64_ISA_V8_2A)
138+
jit_add_target_info ("target_feature", "v8.2a");
139+
if (AARCH64_ISA_V8_3A)
140+
jit_add_target_info ("target_feature", "v8.3a");
141+
if (AARCH64_ISA_V8_4A)
142+
jit_add_target_info ("target_feature", "v8.4a");
143+
if (AARCH64_ISA_V8_5A)
144+
jit_add_target_info ("target_feature", "v8.5a");
145+
if (AARCH64_ISA_V8_6A)
146+
jit_add_target_info ("target_feature", "v8.6a");
147+
if (AARCH64_ISA_V8_7A)
148+
jit_add_target_info ("target_feature", "v8.7a");
149+
}

‎gcc/config/aarch64/aarch64-jit.h

+24
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,24 @@
1+
/* Definitions for the jit front end on the AArch64 architecture.
2+
Copyright (C) 2024 Free Software Foundation, Inc.
3+
4+
GCC is free software; you can redistribute it and/or modify
5+
it under the terms of the GNU General Public License as published by
6+
the Free Software Foundation; either version 3, or (at your option)
7+
any later version.
8+
9+
GCC is distributed in the hope that it will be useful,
10+
but WITHOUT ANY WARRANTY; without even the implied warranty of
11+
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12+
GNU General Public License for more details.
13+
14+
You should have received a copy of the GNU General Public License
15+
along with GCC; see the file COPYING3. If not see
16+
<http://www.gnu.org/licenses/>. */
17+
18+
/* Defined in aarch64-jit.cc */
19+
extern void aarch64_jit_target_versions (void);
20+
extern void aarch64_jit_register_target_info (void);
21+
22+
/* Target hooks for jit language. */
23+
#define TARGET_JIT_CPU_VERSIONS aarch64_jit_target_versions
24+
#define TARGET_JIT_REGISTER_CPU_TARGET_INFO aarch64_jit_register_target_info

‎gcc/config/aarch64/t-aarch64

+4
Original file line numberDiff line numberDiff line change
@@ -148,6 +148,10 @@ aarch64-d.o: $(srcdir)/config/aarch64/aarch64-d.cc
148148
$(COMPILE) $<
149149
$(POSTCOMPILE)
150150

151+
aarch64-jit.o: $(srcdir)/config/aarch64/aarch64-jit.cc
152+
$(COMPILE) $<
153+
$(POSTCOMPILE)
154+
151155
PASSES_EXTRA += $(srcdir)/config/aarch64/aarch64-passes.def
152156

153157
cortex-a57-fma-steering.o: $(srcdir)/config/aarch64/cortex-a57-fma-steering.cc \

0 commit comments

Comments
 (0)