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rguenthRichard Biener
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middle-end/117433 - ICE with gimple BLKmode reg copy
When we end up expanding a SSA name copy with BLKmode regs which can happen for vectors, possibly wrapped in a NOP-conversion or a PAREN_EXPR and we are not optimizing we can end up with two BLKmode MEMs that expand_gimple_stmt_1 doesn't properly handle when expanding, trying to emit_move_insn them. Looking at store_expr which what expand_gimple_stmt_1 is really doing reveals a lot of magic that's missing. It eventually falls back to emit_block_move (store_expr isn't exported), so this is what I ended up using here given I think we'll only have BLKmode "registers" for vectors. PR middle-end/117433 * cfgexpand.cc (expand_gimple_stmt_1): Use emit_block_move when moving temp to BLKmode target. * gcc.dg/pr117433.c: New testcase.
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gcc/cfgexpand.cc

Lines changed: 6 additions & 1 deletion
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@@ -4068,8 +4068,13 @@ expand_gimple_stmt_1 (gimple *stmt)
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else
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{
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temp = force_operand (temp, target);
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if (temp != target)
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if (temp == target)
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;
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else if (GET_MODE (target) != BLKmode)
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emit_move_insn (target, temp);
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else
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emit_block_move (target, temp, expr_size (lhs),
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BLOCK_OP_NORMAL);
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}
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}
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}

gcc/testsuite/gcc.dg/pr117433.c

Lines changed: 21 additions & 0 deletions
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@@ -0,0 +1,21 @@
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/* { dg-do run } */
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__attribute__((__vector_size__ (sizeof (long unsigned) * 8))) long unsigned b;
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void __attribute__((noipa))
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foo ()
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{
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b += __builtin_assoc_barrier (b);
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}
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int main()
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{
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int i;
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for (i = 0; i < 8; ++i)
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b[i] = i;
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foo ();
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for (i = 0; i < 8; ++i)
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if (b[i] != 2*i)
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__builtin_abort ();
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return 0;
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}

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