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lines changed Original file line number Diff line number Diff line change @@ -11,6 +11,7 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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- CSR helper macro ` write_composite_csr ` for writing 64-bit CSRs on 32-bit targets.
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- Write utilities for ` mcycle ` , ` minstret `
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+ - Add ` senvcfg ` CSR
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## [ v0.13.0] - 2025-02-18
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Original file line number Diff line number Diff line change @@ -86,3 +86,35 @@ read_write_csr_field! {
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pmm,
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Pmm : [ 32 : 33 ] ,
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}
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+
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+ #[ cfg( test) ]
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+ mod tests {
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+ use super :: * ;
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+
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+ #[ test]
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+ fn test_senvcfg ( ) {
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+ let mut senvcfg = Senvcfg :: from_bits ( 0 ) ;
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+
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+ test_csr_field ! ( senvcfg, fiom) ;
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+ test_csr_field ! ( senvcfg, lpe) ;
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+
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+ #[ cfg( not( target_arch = "riscv32" ) ) ]
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+ test_csr_field ! ( senvcfg, sse) ;
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+
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+ [ Cbie :: IllegalInstruction , Cbie :: Flush , Cbie :: Invalidate ]
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+ . into_iter ( )
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+ . for_each ( |cbie| {
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+ test_csr_field ! ( senvcfg, cbie: cbie) ;
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+ } ) ;
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+
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+ test_csr_field ! ( senvcfg, cbcfe) ;
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+ test_csr_field ! ( senvcfg, cbze) ;
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+
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+ #[ cfg( not( target_arch = "riscv32" ) ) ]
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+ [ Pmm :: Disabled , Pmm :: Mask7bit , Pmm :: Mask16bit ]
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+ . into_iter ( )
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+ . for_each ( |pmm| {
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+ test_csr_field ! ( senvcfg, pmm: pmm) ;
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+ } ) ;
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+ }
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+ }
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