diff --git a/riscv-rt/CHANGELOG.md b/riscv-rt/CHANGELOG.md
index 8fa2513e..7c47f75c 100644
--- a/riscv-rt/CHANGELOG.md
+++ b/riscv-rt/CHANGELOG.md
@@ -41,6 +41,8 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
   allow users get the initial address of the heap when initializing an allocator.
 - Update documentation.
 - Removed `.init.rust` section, as it is no longer required.
+- Add global `_abort` symbol, `PROVIDE(abort = _abort)`, and replace `DefaultHandler` and
+  `ExceptionHandler` with `PROVIDE(... = abort)`.
 
 ## [v0.13.0] - 2024-10-19
 
diff --git a/riscv-rt/link.x.in b/riscv-rt/link.x.in
index a64d27eb..e210db19 100644
--- a/riscv-rt/link.x.in
+++ b/riscv-rt/link.x.in
@@ -30,6 +30,10 @@ PROVIDE(_heap_size = 0);
 
 /** TRAP ENTRY POINTS **/
 
+/* Default abort entry point. If no abort symbol is provided, then abort maps to _abort. */
+EXTERN(_abort);
+PROVIDE(abort = _abort);
+
 /* Default trap entry point. The riscv-rt crate provides a weak alias of this function,
    which saves caller saved registers, calls _start_trap_rust, restores caller saved registers
    and then returns. Users can override this alias by defining the symbol themselves */
@@ -54,7 +58,7 @@ PROVIDE(_start_MachineExternal_trap = _start_DefaultHandler_trap);
 
 /* Default exception handler. The riscv-rt crate provides a weak alias of this function,
    which is a busy loop. Users can override this alias by defining the symbol themselves */
-EXTERN(ExceptionHandler);
+PROVIDE(ExceptionHandler = abort);
 
 /* It is possible to define a special handler for each exception type.
    By default, all exceptions are handled by ExceptionHandler. However, users can
@@ -76,13 +80,10 @@ PROVIDE(StorePageFault = ExceptionHandler);
 
 /** INTERRUPT HANDLERS **/
 
-/* Default interrupt handler. The riscv-rt crate provides a weak alias of this function,
-   which is a busy loop. Users can override this alias by defining the symbol themselves */
-EXTERN(DefaultHandler);
-
 /* It is possible to define a special handler for each interrupt type.
    By default, all interrupts are handled by DefaultHandler. However, users can
    override these alias by defining the symbol themselves */
+PROVIDE(DefaultHandler = abort);
 PROVIDE(SupervisorSoft = DefaultHandler);
 PROVIDE(MachineSoft = DefaultHandler);
 PROVIDE(SupervisorTimer = DefaultHandler);
diff --git a/riscv-rt/src/asm.rs b/riscv-rt/src/asm.rs
index 098d75c7..b7eb9e02 100644
--- a/riscv-rt/src/asm.rs
+++ b/riscv-rt/src/asm.rs
@@ -251,16 +251,6 @@ _setup_interrupts:",
     #[cfg(not(feature = "s-mode"))]
     "csrw mtvec, t0",
     "ret",
-    // Default implementation of `ExceptionHandler` is an infinite loop.
-    // Users can override this function by defining their own `ExceptionHandler`
-    ".weak ExceptionHandler
-ExceptionHandler:
-    j ExceptionHandler",
-    // Default implementation of `DefaultHandler` is an infinite loop.
-    // Users can override this function by defining their own `DefaultHandler`
-    ".weak DefaultHandler
-DefaultHandler:
-    j DefaultHandler",
     // Default implementation of `_pre_init_trap` is an infinite loop.
     // Users can override this function by defining their own `_pre_init_trap`
     // If the execution reaches this point, it means that there is a bug in the boot code.
@@ -278,7 +268,7 @@ riscv_rt_macros::vectored_interrupt_trap!();
 #[rustfmt::skip]
 global_asm!(
     ".section .text.abort
-.weak abort
-abort:  // make sure there is an abort symbol when linking
-    j abort"
+.global _abort
+_abort:  // make sure there is an abort symbol when linking
+    j _abort"
 );