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Merge pull request #198 from dreiss/master
Add some utility methods to Mstatus and Mcause
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riscv/CHANGELOG.md

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@@ -7,6 +7,11 @@ and this project adheres to [Semantic Versioning](http://semver.org/).
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## [Unreleased]
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### Added
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- Add `Mcause::from(usize)` for use in unit tests
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- Add `Mstatus.bits()`
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### Fixed
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- Fixed `sip::set_ssoft` and `sip::clear_ssoft` using wrong address

riscv/src/register/mcause.rs

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@@ -6,6 +6,13 @@ pub struct Mcause {
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bits: usize,
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}
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impl From<usize> for Mcause {
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#[inline]
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fn from(bits: usize) -> Self {
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Self { bits }
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}
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}
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/// Trap Cause
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#[derive(Copy, Clone, Debug, PartialEq, Eq)]
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pub enum Trap {

riscv/src/register/mstatus.rs

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@@ -65,6 +65,12 @@ impl From<bool> for Endianness {
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}
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impl Mstatus {
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/// Returns the contents of the register as raw bits
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#[inline]
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pub fn bits(&self) -> usize {
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self.bits
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}
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/// Supervisor Interrupt Enable
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#[inline]
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pub fn sie(&self) -> bool {

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