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The cortex-m crate in the master branch is 0.7.4 plus a bunch of fixes
that have never been released. Some of them are breaking changes and so
will never be released. We cannot 'just' release a cortex-m 0.8 with
them in because that is ecosystem shattering - the crate contains a
'links=' attribute, and a bunch of no_mangle functions, so you cannot
have two versions in the same dependency tree.
Instead, there is a 0.7.x branch. This was taken before the cortex-m-rt
crate move. It has cortex-m 0.7.7, which has been published.
This commit just deletes the cortex-m folder and replaces it with
the contents of the cortex-m crate as found on the the 0.7.x branch.
If you want to pick up the changes that have just been deleted, cherry-
pick them into a new branch and open a PR to merge them into here.
Breaking changes for cortex-m into master will no longer be accepted.
Sorry.
Copy file name to clipboardExpand all lines: cortex-m/CHANGELOG.md
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## [Unreleased]
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### Breaking changes
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##[v0.7.7] - 2023-01-03
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-`NVIC::request()` no longer requires `&mut self`.
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-`embedded-hal` version 0.2 delay implementations now required the `eh0` feature.
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-Add missing documentation for `critical-section-single-core` feature added
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in v0.7.6.
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### Added
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- Updated `SCB.ICSR.VECTACTIVE`/`SCB::vect_active()` to be 9 bits instead of 8.
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Also fixes `VectActive::from` to take a `u16` and subtract `16` for
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`VectActive::Interrupt`s to match `SBC::vect_active()` (#373).
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- DWT: add `configure` API for address, cycle count comparison (#342, #367).
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- ITM: add `configure` API (#342).
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- TPIU: add API for *Formatter and Flush Control* (FFCR) and *Selected Pin Control* (SPPR) registers (#342).
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- TPIU: add `swo_supports` for checking what SWO configurations the target supports. (#381)
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- Add `std` and `serde` crate features for improved host-side ITM decode functionality when working with the downstream `itm`, `cargo-rtic-scope` crates (#363, #366).
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- Added the ability to name the statics generated by `singleton!()` for better debuggability (#364, #380).
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- Added `critical-section-single-core` feature which provides an implementation for the `critical_section` crate for single-core systems, based on disabling all interrupts. (#447)
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- Added support for `embedded-hal` version 1 delay traits, requiring rust 1.60.
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-`singleton!()` now forwards attributes (#522).
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- Added `set_sevonpend` and `clear_sevonpend` (#539).
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## [v0.7.6] - 2022-08-12
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### Fixed
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- Fixed `singleton!()` statics sometimes ending up in `.data` instead of `.bss` (#364, #380).
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-`interrupt::free` no longer hands out a `CriticalSection` token because it is unsound on multi-core. Use `critical_section::with` instead. (#447)
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- Added `critical-section-single-core` feature which provides an implementation for the `critical-section` crate for single-core systems, based on disabling all interrupts. (#448)
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## [v0.7.5] - 2022-05-15
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### Deprecated
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- the `ptr()` function on all peripherals register blocks in favor of
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the associated constant `PTR` (#386).
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### Changed
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- Inline assembly is now always used, requiring Rust 1.59.
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- Bumped MSRV to 1.61 for compatibility with syn versions >=2.0.68.
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### Removed
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- removed all peripherals `ptr()` functions in favor of the associated constant `PTR` (#385).
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- removed `inline-asm` feature which is now always enabled
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- The `inline-asm` feature no longer requires a nightly Rust compiler, but
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does require Rust 1.59 or above.
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### Fixed
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- Fixed `singleton!()` statics sometimes ending up in `.data` instead of `.bss` (#364, #380).
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(Backported from upcoming 0.8 release).
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## [v0.7.4] - 2021-12-31
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