Skip to content

Commit a0f9b98

Browse files
thejpsterthejpster
committed
Add two example programs.
1 parent 359ab74 commit a0f9b98

File tree

15 files changed

+301
-1
lines changed

15 files changed

+301
-1
lines changed

‎Cargo.toml

Lines changed: 11 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -1,3 +1,13 @@
11
[workspace]
2-
members = ["tm4c123x-hal", "tm4c129x-hal", "tm4c-hal"]
2+
members = [
3+
"tm4c123x-hal",
4+
"tm4c129x-hal",
5+
"tm4c-hal",
6+
"examples/tiva-c-launchpad",
7+
"examples/tiva-c-connected-launchpad",
8+
]
39

10+
[profile.release]
11+
codegen-units = 1 # better optimizations
12+
debug = true # symbols are nice and they don't increase the size on Flash
13+
lto = true # better optimizations

‎examples/tiva-c-connected-launchpad/.cargo/config

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
2+
# uncomment ONE of these three option to make `cargo run` start a GDB session
3+
# which option to pick depends on your system
4+
# runner = "arm-none-eabi-gdb -q -x openocd.gdb"
5+
# runner = "gdb-multiarch -q -x openocd.gdb"
6+
# runner = "gdb -q -x openocd.gdb"
7+
8+
rustflags = [
9+
"-C", "link-arg=-Tlink.x",
10+
]
11+
12+
[build]
13+
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)

‎examples/tiva-c-connected-launchpad/.gitignore

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
**/*.rs.bk
2+
.#*
3+
.gdb_history
4+
Cargo.lock
5+
target/

‎examples/tiva-c-connected-launchpad/Cargo.toml

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
[package]
2+
authors = [
3+
"Jonathan 'theJPster' Pallant <[email protected]>",
4+
]
5+
edition = "2018"
6+
readme = "README.md"
7+
name = "tiva-c-connected-launchpad"
8+
version = "0.1.0"
9+
10+
[dependencies]
11+
cortex-m = "0.5.8"
12+
cortex-m-rt = "0.6.5"
13+
cortex-m-semihosting = "0.3.2"
14+
panic-halt = "0.2.0"
15+
16+
[dependencies.tm4c129x-hal]
17+
# version = "0.7.0"
18+
path = "../../tm4c129x-hal"
19+
features = ["rt"]
20+
21+
# this lets you use `cargo fix`!
22+
[[bin]]
23+
name = "tiva-c-connected-launchpad"
24+
test = false
25+
bench = false

‎examples/tiva-c-connected-launchpad/README.md

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
# Tiva-C Connected Launchpad Demo Application
2+
3+
> For the Tiva-C Series TM4C1294 Connected Launchpad, [EK-TM4C1294XL](https://www.ti.com/tool/EK-TM4C1294XL)
4+
5+
## License
6+
7+
This template is licensed under either of
8+
9+
- Apache License, Version 2.0 ([LICENSE-APACHE](LICENSE-APACHE) or
10+
http://www.apache.org/licenses/LICENSE-2.0)
11+
12+
- MIT license ([LICENSE-MIT](LICENSE-MIT) or http://opensource.org/licenses/MIT)
13+
14+
at your option.
15+
16+
## Contribution
17+
18+
Unless you explicitly state otherwise, any contribution intentionally submitted
19+
for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
20+
dual licensed as above, without any additional terms or conditions.

‎examples/tiva-c-connected-launchpad/openocd.cfg

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,4 @@
1+
# Sample OpenOCD configuration for the Tiva-C Connected Launchpad development board
2+
3+
source [find board/ek-tm4c1294xl.cfg]
4+

‎examples/tiva-c-connected-launchpad/openocd.gdb

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
target extended-remote :3333
2+
3+
# print demangled symbols
4+
set print asm-demangle on
5+
6+
# detect unhandled exceptions, hard faults and panics
7+
break DefaultHandler
8+
break UserHardFault
9+
break rust_begin_unwind
10+
11+
# *try* to stop at the user entry point (it might be gone due to inlining)
12+
break main
13+
14+
monitor arm semihosting enable
15+
16+
# # send captured ITM to the file itm.fifo
17+
# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
18+
# # 8000000 must match the core clock frequency
19+
# monitor tpiu config internal itm.txt uart off 8000000
20+
21+
# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
22+
# # 8000000 must match the core clock frequency
23+
# # 2000000 is the frequency of the SWO pin
24+
# monitor tpiu config external uart off 8000000 2000000
25+
26+
# # enable ITM port 0
27+
# monitor itm port 0 on
28+
29+
load
30+
31+
# start the process but immediately halt the processor
32+
stepi

‎examples/tiva-c-connected-launchpad/src/main.rs

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
#![no_std]
2+
#![no_main]
3+
4+
extern crate panic_halt; // you can put a breakpoint on `rust_begin_unwind` to catch panics
5+
extern crate tm4c129x_hal as hal;
6+
7+
use core::fmt::Write;
8+
use cortex_m_rt::entry;
9+
use hal::prelude::*;
10+
11+
#[entry]
12+
fn main() -> ! {
13+
let p = hal::Peripherals::take().unwrap();
14+
15+
let mut sc = p.SYSCTL.constrain();
16+
sc.clock_setup.oscillator = hal::sysctl::Oscillator::Main(
17+
hal::sysctl::CrystalFrequency::_16mhz,
18+
hal::sysctl::SystemClock::UsePll(hal::sysctl::PllOutputFrequency::_120mhz),
19+
);
20+
let clocks = sc.clock_setup.freeze();
21+
22+
let mut porta = p.GPIO_PORTA_AHB.split(&sc.power_control);
23+
24+
// Activate UART
25+
let mut uart = hal::serial::Serial::uart0(
26+
p.UART0,
27+
porta
28+
.pa1
29+
.into_af_push_pull::<hal::gpio::AF1>(&mut porta.control),
30+
porta
31+
.pa0
32+
.into_af_push_pull::<hal::gpio::AF1>(&mut porta.control),
33+
(),
34+
(),
35+
115200_u32.bps(),
36+
hal::serial::NewlineMode::SwapLFtoCRLF,
37+
&clocks,
38+
&sc.power_control,
39+
);
40+
41+
let mut counter = 0u32;
42+
loop {
43+
writeln!(uart, "Hello, world! counter={}", counter).unwrap();
44+
counter = counter.wrapping_add(1);
45+
}
46+
}

‎examples/tiva-c-launchpad/.cargo/config

Lines changed: 13 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,13 @@
1+
[target.'cfg(all(target_arch = "arm", target_os = "none"))']
2+
# uncomment ONE of these three option to make `cargo run` start a GDB session
3+
# which option to pick depends on your system
4+
# runner = "arm-none-eabi-gdb -q -x openocd.gdb"
5+
# runner = "gdb-multiarch -q -x openocd.gdb"
6+
# runner = "gdb -q -x openocd.gdb"
7+
8+
rustflags = [
9+
"-C", "link-arg=-Tlink.x",
10+
]
11+
12+
[build]
13+
target = "thumbv7em-none-eabihf" # Cortex-M4F and Cortex-M7F (with FPU)

‎examples/tiva-c-launchpad/.gitignore

Lines changed: 5 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,5 @@
1+
**/*.rs.bk
2+
.#*
3+
.gdb_history
4+
Cargo.lock
5+
target/

‎examples/tiva-c-launchpad/Cargo.toml

Lines changed: 25 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,25 @@
1+
[package]
2+
authors = [
3+
"Jonathan 'theJPster' Pallant <[email protected]>",
4+
]
5+
edition = "2018"
6+
readme = "README.md"
7+
name = "tiva-c-launchpad"
8+
version = "0.1.0"
9+
10+
[dependencies]
11+
cortex-m = "0.5.8"
12+
cortex-m-rt = "0.6.5"
13+
cortex-m-semihosting = "0.3.2"
14+
panic-halt = "0.2.0"
15+
16+
[dependencies.tm4c123x-hal]
17+
# version = "0.8.0"
18+
path = "../../tm4c123x-hal"
19+
features = ["rt"]
20+
21+
# this lets you use `cargo fix`!
22+
[[bin]]
23+
name = "tiva-c-launchpad"
24+
test = false
25+
bench = false

‎examples/tiva-c-launchpad/README.md

Lines changed: 20 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,20 @@
1+
# Tiva-C Launchpad Demo Application
2+
3+
> For the Tiva-C Series TM4C123G Launchpad, [EK-TM4C123GXL](https://www.ti.com/tool/EK-TM4C123GXL)
4+
5+
## License
6+
7+
This template is licensed under either of
8+
9+
- Apache License, Version 2.0 ([LICENSE-APACHE](../../LICENSE-APACHE) or
10+
http://www.apache.org/licenses/LICENSE-2.0)
11+
12+
- MIT license ([LICENSE-MIT](../../LICENSE-MIT) or http://opensource.org/licenses/MIT)
13+
14+
at your option.
15+
16+
## Contribution
17+
18+
Unless you explicitly state otherwise, any contribution intentionally submitted
19+
for inclusion in the work by you, as defined in the Apache-2.0 license, shall be
20+
dual licensed as above, without any additional terms or conditions.

‎examples/tiva-c-launchpad/openocd.cfg

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,4 @@
1+
# Sample OpenOCD configuration for the Tiva-C Launchpad development board
2+
3+
source [find board/ek-tm4c124gxl.cfg]
4+

‎examples/tiva-c-launchpad/openocd.gdb

Lines changed: 32 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,32 @@
1+
target extended-remote :3333
2+
3+
# print demangled symbols
4+
set print asm-demangle on
5+
6+
# detect unhandled exceptions, hard faults and panics
7+
break DefaultHandler
8+
break UserHardFault
9+
break rust_begin_unwind
10+
11+
# *try* to stop at the user entry point (it might be gone due to inlining)
12+
break main
13+
14+
monitor arm semihosting enable
15+
16+
# # send captured ITM to the file itm.fifo
17+
# # (the microcontroller SWO pin must be connected to the programmer SWO pin)
18+
# # 8000000 must match the core clock frequency
19+
# monitor tpiu config internal itm.txt uart off 8000000
20+
21+
# # OR: make the microcontroller SWO pin output compatible with UART (8N1)
22+
# # 8000000 must match the core clock frequency
23+
# # 2000000 is the frequency of the SWO pin
24+
# monitor tpiu config external uart off 8000000 2000000
25+
26+
# # enable ITM port 0
27+
# monitor itm port 0 on
28+
29+
load
30+
31+
# start the process but immediately halt the processor
32+
stepi

‎examples/tiva-c-launchpad/src/main.rs

Lines changed: 46 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,46 @@
1+
#![no_std]
2+
#![no_main]
3+
4+
extern crate panic_halt; // you can put a breakpoint on `rust_begin_unwind` to catch panics
5+
extern crate tm4c123x_hal as hal;
6+
7+
use core::fmt::Write;
8+
use cortex_m_rt::entry;
9+
use hal::prelude::*;
10+
11+
#[entry]
12+
fn main() -> ! {
13+
let p = hal::Peripherals::take().unwrap();
14+
15+
let mut sc = p.SYSCTL.constrain();
16+
sc.clock_setup.oscillator = hal::sysctl::Oscillator::Main(
17+
hal::sysctl::CrystalFrequency::_16mhz,
18+
hal::sysctl::SystemClock::UsePll(hal::sysctl::PllOutputFrequency::_80_00mhz),
19+
);
20+
let clocks = sc.clock_setup.freeze();
21+
22+
let mut porta = p.GPIO_PORTA_AHB.split(&sc.power_control);
23+
24+
// Activate UART
25+
let mut uart = hal::serial::Serial::uart0(
26+
p.UART0,
27+
porta
28+
.pa1
29+
.into_af_push_pull::<hal::gpio::AF1>(&mut porta.control),
30+
porta
31+
.pa0
32+
.into_af_push_pull::<hal::gpio::AF1>(&mut porta.control),
33+
(),
34+
(),
35+
115200_u32.bps(),
36+
hal::serial::NewlineMode::SwapLFtoCRLF,
37+
&clocks,
38+
&sc.power_control,
39+
);
40+
41+
let mut counter = 0u32;
42+
loop {
43+
writeln!(uart, "Hello, world! counter={}", counter).unwrap();
44+
counter = counter.wrapping_add(1);
45+
}
46+
}

0 commit comments

Comments
 (0)