|
1 |
| -update=22/05/2015 07:44:53 |
| 1 | +update=2021 March 07, Sunday 12:34:13 |
2 | 2 | version=1
|
3 | 3 | last_client=kicad
|
4 | 4 | [general]
|
5 | 5 | version=1
|
6 | 6 | RootSch=
|
7 | 7 | BoardNm=
|
8 |
| -[pcbnew] |
9 |
| -version=1 |
10 |
| -LastNetListRead= |
11 |
| -UseCmpFile=1 |
12 |
| -PadDrill=0.600000000000 |
13 |
| -PadDrillOvalY=0.600000000000 |
14 |
| -PadSizeH=1.500000000000 |
15 |
| -PadSizeV=1.500000000000 |
16 |
| -PcbTextSizeV=1.500000000000 |
17 |
| -PcbTextSizeH=1.500000000000 |
18 |
| -PcbTextThickness=0.300000000000 |
19 |
| -ModuleTextSizeV=1.000000000000 |
20 |
| -ModuleTextSizeH=1.000000000000 |
21 |
| -ModuleTextSizeThickness=0.150000000000 |
22 |
| -SolderMaskClearance=0.000000000000 |
23 |
| -SolderMaskMinWidth=0.000000000000 |
24 |
| -DrawSegmentWidth=0.200000000000 |
25 |
| -BoardOutlineThickness=0.100000000000 |
26 |
| -ModuleOutlineThickness=0.150000000000 |
27 | 8 | [cvpcb]
|
28 | 9 | version=1
|
29 | 10 | NetIExt=net
|
30 | 11 | [eeschema]
|
31 | 12 | version=1
|
32 | 13 | LibDir=
|
33 | 14 | [eeschema/libraries]
|
| 15 | +[pcbnew] |
| 16 | +version=1 |
| 17 | +PageLayoutDescrFile= |
| 18 | +LastNetListRead= |
| 19 | +CopperLayerCount=2 |
| 20 | +BoardThickness=1.6 |
| 21 | +AllowMicroVias=0 |
| 22 | +AllowBlindVias=0 |
| 23 | +RequireCourtyardDefinitions=0 |
| 24 | +ProhibitOverlappingCourtyards=1 |
| 25 | +MinTrackWidth=0.126 |
| 26 | +MinViaDiameter=0.4 |
| 27 | +MinViaDrill=0.2 |
| 28 | +MinMicroViaDiameter=0.2 |
| 29 | +MinMicroViaDrill=0.09999999999999999 |
| 30 | +MinHoleToHole=0.25 |
| 31 | +TrackWidth1=0.155 |
| 32 | +ViaDiameter1=0.6 |
| 33 | +ViaDrill1=0.34 |
| 34 | +dPairWidth1=0.2 |
| 35 | +dPairGap1=0.25 |
| 36 | +dPairViaGap1=0.25 |
| 37 | +SilkLineWidth=0.1524 |
| 38 | +SilkTextSizeV=0.8128 |
| 39 | +SilkTextSizeH=0.8128 |
| 40 | +SilkTextSizeThickness=0.1524 |
| 41 | +SilkTextItalic=0 |
| 42 | +SilkTextUpright=1 |
| 43 | +CopperLineWidth=0.254 |
| 44 | +CopperTextSizeV=1.524 |
| 45 | +CopperTextSizeH=1.524 |
| 46 | +CopperTextThickness=0.3048 |
| 47 | +CopperTextItalic=0 |
| 48 | +CopperTextUpright=1 |
| 49 | +EdgeCutLineWidth=0.03809999999999999 |
| 50 | +CourtyardLineWidth=0.05 |
| 51 | +OthersLineWidth=0.15 |
| 52 | +OthersTextSizeV=1 |
| 53 | +OthersTextSizeH=1 |
| 54 | +OthersTextSizeThickness=0.15 |
| 55 | +OthersTextItalic=0 |
| 56 | +OthersTextUpright=1 |
| 57 | +SolderMaskClearance=0 |
| 58 | +SolderMaskMinWidth=0.12 |
| 59 | +SolderPasteClearance=0 |
| 60 | +SolderPasteRatio=-0 |
| 61 | +[pcbnew/Layer.F.Cu] |
| 62 | +Name=F.Cu |
| 63 | +Type=0 |
| 64 | +Enabled=1 |
| 65 | +[pcbnew/Layer.In1.Cu] |
| 66 | +Name=In1.Cu |
| 67 | +Type=0 |
| 68 | +Enabled=0 |
| 69 | +[pcbnew/Layer.In2.Cu] |
| 70 | +Name=In2.Cu |
| 71 | +Type=0 |
| 72 | +Enabled=0 |
| 73 | +[pcbnew/Layer.In3.Cu] |
| 74 | +Name=In3.Cu |
| 75 | +Type=0 |
| 76 | +Enabled=0 |
| 77 | +[pcbnew/Layer.In4.Cu] |
| 78 | +Name=In4.Cu |
| 79 | +Type=0 |
| 80 | +Enabled=0 |
| 81 | +[pcbnew/Layer.In5.Cu] |
| 82 | +Name=In5.Cu |
| 83 | +Type=0 |
| 84 | +Enabled=0 |
| 85 | +[pcbnew/Layer.In6.Cu] |
| 86 | +Name=In6.Cu |
| 87 | +Type=0 |
| 88 | +Enabled=0 |
| 89 | +[pcbnew/Layer.In7.Cu] |
| 90 | +Name=In7.Cu |
| 91 | +Type=0 |
| 92 | +Enabled=0 |
| 93 | +[pcbnew/Layer.In8.Cu] |
| 94 | +Name=In8.Cu |
| 95 | +Type=0 |
| 96 | +Enabled=0 |
| 97 | +[pcbnew/Layer.In9.Cu] |
| 98 | +Name=In9.Cu |
| 99 | +Type=0 |
| 100 | +Enabled=0 |
| 101 | +[pcbnew/Layer.In10.Cu] |
| 102 | +Name=In10.Cu |
| 103 | +Type=0 |
| 104 | +Enabled=0 |
| 105 | +[pcbnew/Layer.In11.Cu] |
| 106 | +Name=In11.Cu |
| 107 | +Type=0 |
| 108 | +Enabled=0 |
| 109 | +[pcbnew/Layer.In12.Cu] |
| 110 | +Name=In12.Cu |
| 111 | +Type=0 |
| 112 | +Enabled=0 |
| 113 | +[pcbnew/Layer.In13.Cu] |
| 114 | +Name=In13.Cu |
| 115 | +Type=0 |
| 116 | +Enabled=0 |
| 117 | +[pcbnew/Layer.In14.Cu] |
| 118 | +Name=In14.Cu |
| 119 | +Type=0 |
| 120 | +Enabled=0 |
| 121 | +[pcbnew/Layer.In15.Cu] |
| 122 | +Name=In15.Cu |
| 123 | +Type=0 |
| 124 | +Enabled=0 |
| 125 | +[pcbnew/Layer.In16.Cu] |
| 126 | +Name=In16.Cu |
| 127 | +Type=0 |
| 128 | +Enabled=0 |
| 129 | +[pcbnew/Layer.In17.Cu] |
| 130 | +Name=In17.Cu |
| 131 | +Type=0 |
| 132 | +Enabled=0 |
| 133 | +[pcbnew/Layer.In18.Cu] |
| 134 | +Name=In18.Cu |
| 135 | +Type=0 |
| 136 | +Enabled=0 |
| 137 | +[pcbnew/Layer.In19.Cu] |
| 138 | +Name=In19.Cu |
| 139 | +Type=0 |
| 140 | +Enabled=0 |
| 141 | +[pcbnew/Layer.In20.Cu] |
| 142 | +Name=In20.Cu |
| 143 | +Type=0 |
| 144 | +Enabled=0 |
| 145 | +[pcbnew/Layer.In21.Cu] |
| 146 | +Name=In21.Cu |
| 147 | +Type=0 |
| 148 | +Enabled=0 |
| 149 | +[pcbnew/Layer.In22.Cu] |
| 150 | +Name=In22.Cu |
| 151 | +Type=0 |
| 152 | +Enabled=0 |
| 153 | +[pcbnew/Layer.In23.Cu] |
| 154 | +Name=In23.Cu |
| 155 | +Type=0 |
| 156 | +Enabled=0 |
| 157 | +[pcbnew/Layer.In24.Cu] |
| 158 | +Name=In24.Cu |
| 159 | +Type=0 |
| 160 | +Enabled=0 |
| 161 | +[pcbnew/Layer.In25.Cu] |
| 162 | +Name=In25.Cu |
| 163 | +Type=0 |
| 164 | +Enabled=0 |
| 165 | +[pcbnew/Layer.In26.Cu] |
| 166 | +Name=In26.Cu |
| 167 | +Type=0 |
| 168 | +Enabled=0 |
| 169 | +[pcbnew/Layer.In27.Cu] |
| 170 | +Name=In27.Cu |
| 171 | +Type=0 |
| 172 | +Enabled=0 |
| 173 | +[pcbnew/Layer.In28.Cu] |
| 174 | +Name=In28.Cu |
| 175 | +Type=0 |
| 176 | +Enabled=0 |
| 177 | +[pcbnew/Layer.In29.Cu] |
| 178 | +Name=In29.Cu |
| 179 | +Type=0 |
| 180 | +Enabled=0 |
| 181 | +[pcbnew/Layer.In30.Cu] |
| 182 | +Name=In30.Cu |
| 183 | +Type=0 |
| 184 | +Enabled=0 |
| 185 | +[pcbnew/Layer.B.Cu] |
| 186 | +Name=B.Cu |
| 187 | +Type=0 |
| 188 | +Enabled=1 |
| 189 | +[pcbnew/Layer.B.Adhes] |
| 190 | +Enabled=1 |
| 191 | +[pcbnew/Layer.F.Adhes] |
| 192 | +Enabled=1 |
| 193 | +[pcbnew/Layer.B.Paste] |
| 194 | +Enabled=1 |
| 195 | +[pcbnew/Layer.F.Paste] |
| 196 | +Enabled=1 |
| 197 | +[pcbnew/Layer.B.SilkS] |
| 198 | +Enabled=1 |
| 199 | +[pcbnew/Layer.F.SilkS] |
| 200 | +Enabled=1 |
| 201 | +[pcbnew/Layer.B.Mask] |
| 202 | +Enabled=1 |
| 203 | +[pcbnew/Layer.F.Mask] |
| 204 | +Enabled=1 |
| 205 | +[pcbnew/Layer.Dwgs.User] |
| 206 | +Enabled=1 |
| 207 | +[pcbnew/Layer.Cmts.User] |
| 208 | +Enabled=1 |
| 209 | +[pcbnew/Layer.Eco1.User] |
| 210 | +Enabled=1 |
| 211 | +[pcbnew/Layer.Eco2.User] |
| 212 | +Enabled=1 |
| 213 | +[pcbnew/Layer.Edge.Cuts] |
| 214 | +Enabled=1 |
| 215 | +[pcbnew/Layer.Margin] |
| 216 | +Enabled=1 |
| 217 | +[pcbnew/Layer.B.CrtYd] |
| 218 | +Enabled=1 |
| 219 | +[pcbnew/Layer.F.CrtYd] |
| 220 | +Enabled=1 |
| 221 | +[pcbnew/Layer.B.Fab] |
| 222 | +Enabled=1 |
| 223 | +[pcbnew/Layer.F.Fab] |
| 224 | +Enabled=1 |
| 225 | +[pcbnew/Layer.Rescue] |
| 226 | +Enabled=0 |
| 227 | +[pcbnew/Netclasses] |
| 228 | +[pcbnew/Netclasses/Default] |
| 229 | +Name=Default |
| 230 | +Clearance=0.2 |
| 231 | +TrackWidth=0.155 |
| 232 | +ViaDiameter=0.6 |
| 233 | +ViaDrill=0.34 |
| 234 | +uViaDiameter=0.3 |
| 235 | +uViaDrill=0.1 |
| 236 | +dPairWidth=0.2 |
| 237 | +dPairGap=0.25 |
| 238 | +dPairViaGap=0.25 |
| 239 | +[pcbnew/Netclasses/1] |
| 240 | +Name=Power |
| 241 | +Clearance=0.2 |
| 242 | +TrackWidth=0.5 |
| 243 | +ViaDiameter=0.6 |
| 244 | +ViaDrill=0.4 |
| 245 | +uViaDiameter=0.3 |
| 246 | +uViaDrill=0.1 |
| 247 | +dPairWidth=0.2 |
| 248 | +dPairGap=0.25 |
| 249 | +dPairViaGap=0.25 |
| 250 | +[schematic_editor] |
| 251 | +version=1 |
| 252 | +PageLayoutDescrFile= |
| 253 | +PlotDirectoryName=docs/ |
| 254 | +SubpartIdSeparator=0 |
| 255 | +SubpartFirstId=65 |
| 256 | +NetFmtName= |
| 257 | +SpiceAjustPassiveValues=0 |
| 258 | +LabSize=50 |
| 259 | +ERC_TestSimilarLabels=1 |
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