clk: rp1: Reserve pll_audio* for clk_i2s

Prevent all clocks except clk_i2s from using the audio PLLs as sources,
so that clk_i2s may be allowed to change them as needed.

Signed-off-by: Phil Elwell <[email protected]>

Author: pelwell

drivers/clk/clk-rp1.c

@@ -1744,7 +1744,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 
 	[RP1_CLK_PWM0] = REGISTER_CLK(
 				.name = "clk_pwm0",
-				.parents = {"pll_audio_pri_ph",
+				.parents = {"", // "pll_audio_pri_ph",
 					    "pll_video_sec",
 					    "xosc",
 					    "clksrc_gp0",
@@ -1766,7 +1766,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 
 	[RP1_CLK_PWM1] = REGISTER_CLK(
 				.name = "clk_pwm1",
-				.parents = {"pll_audio_pri_ph",
+				.parents = {"", // "pll_audio_pri_ph",
 					    "pll_video_sec",
 					    "xosc",
 					    "clksrc_gp0",
@@ -1788,9 +1788,9 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 
 	[RP1_CLK_AUDIO_IN] = REGISTER_CLK(
 				.name = "clk_audio_in",
-				.parents = {"pll_audio",
-					    "pll_audio_pri_ph",
-					    "pll_audio_sec",
+				.parents = {"", //"pll_audio",
+					    "", //"pll_audio_pri_ph",
+					    "", //"pll_audio_sec",
 					    "pll_video_sec",
 					    "xosc",
 					    "clksrc_gp0",
@@ -1811,8 +1811,8 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 
 	[RP1_CLK_AUDIO_OUT] = REGISTER_CLK(
 				.name = "clk_audio_out",
-				.parents = {"pll_audio",
-					    "pll_audio_sec",
+				.parents = {"", //"pll_audio",
+					    "", //"pll_audio_sec",
 					    "pll_video_sec",
 					    "xosc",
 					    "clksrc_gp0",
@@ -1902,7 +1902,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 	[RP1_CLK_ADC] = REGISTER_CLK(
 				.name = "clk_adc",
 				.parents = {"xosc",
-					    "pll_audio_tern",
+					    "", //"pll_audio_tern",
 					    "clksrc_gp0",
 					    "clksrc_gp1",
 					    "clksrc_gp2",
@@ -1954,7 +1954,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 					    "clksrc_gp4",
 					    "clksrc_gp5",
 					    "pll_sys",
-					    "pll_audio",
+					    "", //"pll_audio",
 					    "",
 					    "",
 					    "clk_i2s",
@@ -1984,7 +1984,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 					    "clksrc_gp4",
 					    "clksrc_gp5",
 					    "pll_sys_pri_ph",
-					    "pll_audio_pri_ph",
+					    "", //"pll_audio_pri_ph",
 					    "",
 					    "",
 					    "clk_adc",
@@ -2014,7 +2014,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 					    "clksrc_gp4",
 					    "clksrc_gp5",
 					    "pll_sys_sec",
-					    "pll_audio_sec",
+					    "", //"pll_audio_sec",
 					    "pll_video",
 					    "clk_audio_in",
 					    "clk_dpi",
@@ -2073,7 +2073,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 					    "clksrc_gp2",
 					    "clksrc_gp3",
 					    "clksrc_gp5",
-					    "pll_audio_tern",
+					    "", //"pll_audio_tern",
 					    "pll_video_sec",
 					    "",
 					    "",
@@ -2104,7 +2104,7 @@ static const struct rp1_clk_desc clk_desc_array[] = {
 					    "clksrc_gp2",
 					    "clksrc_gp3",
 					    "clksrc_gp4",
-					    "pll_audio_tern",
+					    "", //"pll_audio_tern",
 					    "pll_video_sec",
 					    "clk_eth_tsu",
 					    "",