@@ -6826,6 +6826,78 @@ qla2x00_release_firmware(void)
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mutex_unlock (& qla_fw_lock );
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}
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+ static void qla_pci_error_cleanup (scsi_qla_host_t * vha )
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+ {
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+ struct qla_hw_data * ha = vha -> hw ;
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+ scsi_qla_host_t * base_vha = pci_get_drvdata (ha -> pdev );
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+ struct qla_qpair * qpair = NULL ;
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+ struct scsi_qla_host * vp ;
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+ fc_port_t * fcport ;
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+ int i ;
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+ unsigned long flags ;
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+
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+ ha -> chip_reset ++ ;
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+
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+ ha -> base_qpair -> chip_reset = ha -> chip_reset ;
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+ for (i = 0 ; i < ha -> max_qpairs ; i ++ ) {
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+ if (ha -> queue_pair_map [i ])
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+ ha -> queue_pair_map [i ]-> chip_reset =
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+ ha -> base_qpair -> chip_reset ;
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+ }
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+
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+ /* purge MBox commands */
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+ if (atomic_read (& ha -> num_pend_mbx_stage3 )) {
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+ clear_bit (MBX_INTR_WAIT , & ha -> mbx_cmd_flags );
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+ complete (& ha -> mbx_intr_comp );
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+ }
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+
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+ i = 0 ;
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+
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+ while (atomic_read (& ha -> num_pend_mbx_stage3 ) ||
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+ atomic_read (& ha -> num_pend_mbx_stage2 ) ||
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+ atomic_read (& ha -> num_pend_mbx_stage1 )) {
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+ msleep (20 );
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+ i ++ ;
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+ if (i > 50 )
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+ break ;
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+ }
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+
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+ ha -> flags .purge_mbox = 0 ;
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+
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+ mutex_lock (& ha -> mq_lock );
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+ list_for_each_entry (qpair , & base_vha -> qp_list , qp_list_elem )
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+ qpair -> online = 0 ;
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+ mutex_unlock (& ha -> mq_lock );
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+
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+ qla2x00_mark_all_devices_lost (vha , 0 );
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+
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+ spin_lock_irqsave (& ha -> vport_slock , flags );
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+ list_for_each_entry (vp , & ha -> vp_list , list ) {
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+ atomic_inc (& vp -> vref_count );
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+ spin_unlock_irqrestore (& ha -> vport_slock , flags );
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+ qla2x00_mark_all_devices_lost (vp , 0 );
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+ spin_lock_irqsave (& ha -> vport_slock , flags );
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+ atomic_dec (& vp -> vref_count );
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+ }
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+ spin_unlock_irqrestore (& ha -> vport_slock , flags );
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+
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+ /* Clear all async request states across all VPs. */
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+ list_for_each_entry (fcport , & vha -> vp_fcports , list )
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+ fcport -> flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT );
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+
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+ spin_lock_irqsave (& ha -> vport_slock , flags );
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+ list_for_each_entry (vp , & ha -> vp_list , list ) {
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+ atomic_inc (& vp -> vref_count );
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+ spin_unlock_irqrestore (& ha -> vport_slock , flags );
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+ list_for_each_entry (fcport , & vp -> vp_fcports , list )
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+ fcport -> flags &= ~(FCF_LOGIN_NEEDED | FCF_ASYNC_SENT );
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+ spin_lock_irqsave (& ha -> vport_slock , flags );
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+ atomic_dec (& vp -> vref_count );
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+ }
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+ spin_unlock_irqrestore (& ha -> vport_slock , flags );
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+ }
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+
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+
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static pci_ers_result_t
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qla2xxx_pci_error_detected (struct pci_dev * pdev , pci_channel_state_t state )
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{
@@ -6851,20 +6923,7 @@ qla2xxx_pci_error_detected(struct pci_dev *pdev, pci_channel_state_t state)
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return PCI_ERS_RESULT_CAN_RECOVER ;
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case pci_channel_io_frozen :
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ha -> flags .eeh_busy = 1 ;
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- /* For ISP82XX complete any pending mailbox cmd */
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- if (IS_QLA82XX (ha )) {
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- ha -> flags .isp82xx_fw_hung = 1 ;
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- ql_dbg (ql_dbg_aer , vha , 0x9001 , "Pci channel io frozen\n" );
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- qla82xx_clear_pending_mbx (vha );
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- }
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- qla2x00_free_irqs (vha );
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- pci_disable_device (pdev );
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- /* Return back all IOs */
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- qla2x00_abort_all_cmds (vha , DID_RESET << 16 );
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- if (ql2xmqsupport || ql2xnvmeenable ) {
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- set_bit (QPAIR_ONLINE_CHECK_NEEDED , & vha -> dpc_flags );
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- qla2xxx_wake_dpc (vha );
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- }
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+ qla_pci_error_cleanup (vha );
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return PCI_ERS_RESULT_NEED_RESET ;
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case pci_channel_io_perm_failure :
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ha -> flags .pci_channel_io_perm_failure = 1 ;
@@ -6918,122 +6977,14 @@ qla2xxx_pci_mmio_enabled(struct pci_dev *pdev)
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return PCI_ERS_RESULT_RECOVERED ;
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}
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- static uint32_t
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- qla82xx_error_recovery (scsi_qla_host_t * base_vha )
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- {
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- uint32_t rval = QLA_FUNCTION_FAILED ;
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- uint32_t drv_active = 0 ;
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- struct qla_hw_data * ha = base_vha -> hw ;
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- int fn ;
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- struct pci_dev * other_pdev = NULL ;
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-
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- ql_dbg (ql_dbg_aer , base_vha , 0x9006 ,
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- "Entered %s.\n" , __func__ );
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-
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- set_bit (ABORT_ISP_ACTIVE , & base_vha -> dpc_flags );
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-
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- if (base_vha -> flags .online ) {
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- /* Abort all outstanding commands,
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- * so as to be requeued later */
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- qla2x00_abort_isp_cleanup (base_vha );
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- }
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-
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-
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- fn = PCI_FUNC (ha -> pdev -> devfn );
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- while (fn > 0 ) {
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- fn -- ;
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- ql_dbg (ql_dbg_aer , base_vha , 0x9007 ,
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- "Finding pci device at function = 0x%x.\n" , fn );
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- other_pdev =
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- pci_get_domain_bus_and_slot (pci_domain_nr (ha -> pdev -> bus ),
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- ha -> pdev -> bus -> number , PCI_DEVFN (PCI_SLOT (ha -> pdev -> devfn ),
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- fn ));
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-
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- if (!other_pdev )
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- continue ;
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- if (atomic_read (& other_pdev -> enable_cnt )) {
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- ql_dbg (ql_dbg_aer , base_vha , 0x9008 ,
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- "Found PCI func available and enable at 0x%x.\n" ,
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- fn );
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- pci_dev_put (other_pdev );
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- break ;
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- }
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- pci_dev_put (other_pdev );
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- }
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-
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- if (!fn ) {
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- /* Reset owner */
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- ql_dbg (ql_dbg_aer , base_vha , 0x9009 ,
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- "This devfn is reset owner = 0x%x.\n" ,
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- ha -> pdev -> devfn );
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- qla82xx_idc_lock (ha );
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-
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- qla82xx_wr_32 (ha , QLA82XX_CRB_DEV_STATE ,
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- QLA8XXX_DEV_INITIALIZING );
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-
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- qla82xx_wr_32 (ha , QLA82XX_CRB_DRV_IDC_VERSION ,
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- QLA82XX_IDC_VERSION );
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-
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- drv_active = qla82xx_rd_32 (ha , QLA82XX_CRB_DRV_ACTIVE );
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- ql_dbg (ql_dbg_aer , base_vha , 0x900a ,
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- "drv_active = 0x%x.\n" , drv_active );
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-
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- qla82xx_idc_unlock (ha );
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- /* Reset if device is not already reset
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- * drv_active would be 0 if a reset has already been done
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- */
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- if (drv_active )
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- rval = qla82xx_start_firmware (base_vha );
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- else
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- rval = QLA_SUCCESS ;
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- qla82xx_idc_lock (ha );
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-
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- if (rval != QLA_SUCCESS ) {
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- ql_log (ql_log_info , base_vha , 0x900b ,
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- "HW State: FAILED.\n" );
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- qla82xx_clear_drv_active (ha );
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- qla82xx_wr_32 (ha , QLA82XX_CRB_DEV_STATE ,
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- QLA8XXX_DEV_FAILED );
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- } else {
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- ql_log (ql_log_info , base_vha , 0x900c ,
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- "HW State: READY.\n" );
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- qla82xx_wr_32 (ha , QLA82XX_CRB_DEV_STATE ,
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- QLA8XXX_DEV_READY );
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- qla82xx_idc_unlock (ha );
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- ha -> flags .isp82xx_fw_hung = 0 ;
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- rval = qla82xx_restart_isp (base_vha );
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- qla82xx_idc_lock (ha );
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- /* Clear driver state register */
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- qla82xx_wr_32 (ha , QLA82XX_CRB_DRV_STATE , 0 );
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- qla82xx_set_drv_active (base_vha );
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- }
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- qla82xx_idc_unlock (ha );
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- } else {
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- ql_dbg (ql_dbg_aer , base_vha , 0x900d ,
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- "This devfn is not reset owner = 0x%x.\n" ,
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- ha -> pdev -> devfn );
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- if ((qla82xx_rd_32 (ha , QLA82XX_CRB_DEV_STATE ) ==
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- QLA8XXX_DEV_READY )) {
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- ha -> flags .isp82xx_fw_hung = 0 ;
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- rval = qla82xx_restart_isp (base_vha );
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- qla82xx_idc_lock (ha );
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- qla82xx_set_drv_active (base_vha );
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- qla82xx_idc_unlock (ha );
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- }
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- }
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- clear_bit (ABORT_ISP_ACTIVE , & base_vha -> dpc_flags );
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-
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- return rval ;
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- }
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-
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static pci_ers_result_t
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qla2xxx_pci_slot_reset (struct pci_dev * pdev )
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{
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pci_ers_result_t ret = PCI_ERS_RESULT_DISCONNECT ;
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scsi_qla_host_t * base_vha = pci_get_drvdata (pdev );
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struct qla_hw_data * ha = base_vha -> hw ;
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- struct rsp_que * rsp ;
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- int rc , retries = 10 ;
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+ int rc ;
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+ struct qla_qpair * qpair = NULL ;
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ql_dbg (ql_dbg_aer , base_vha , 0x9004 ,
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"Slot Reset.\n" );
@@ -7062,24 +7013,16 @@ qla2xxx_pci_slot_reset(struct pci_dev *pdev)
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goto exit_slot_reset ;
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}
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- rsp = ha -> rsp_q_map [0 ];
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- if (qla2x00_request_irqs (ha , rsp ))
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- goto exit_slot_reset ;
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if (ha -> isp_ops -> pci_config (base_vha ))
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goto exit_slot_reset ;
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- if (IS_QLA82XX (ha )) {
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- if (qla82xx_error_recovery (base_vha ) == QLA_SUCCESS ) {
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- ret = PCI_ERS_RESULT_RECOVERED ;
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- goto exit_slot_reset ;
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- } else
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- goto exit_slot_reset ;
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- }
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-
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- while (ha -> flags .mbox_busy && retries -- )
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- msleep (1000 );
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+ mutex_lock (& ha -> mq_lock );
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+ list_for_each_entry (qpair , & base_vha -> qp_list , qp_list_elem )
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+ qpair -> online = 1 ;
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+ mutex_unlock (& ha -> mq_lock );
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+ base_vha -> flags .online = 1 ;
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set_bit (ABORT_ISP_ACTIVE , & base_vha -> dpc_flags );
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if (ha -> isp_ops -> abort_isp (base_vha ) == QLA_SUCCESS )
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ret = PCI_ERS_RESULT_RECOVERED ;
@@ -7103,13 +7046,13 @@ qla2xxx_pci_resume(struct pci_dev *pdev)
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ql_dbg (ql_dbg_aer , base_vha , 0x900f ,
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"pci_resume.\n" );
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+ ha -> flags .eeh_busy = 0 ;
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+
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ret = qla2x00_wait_for_hba_online (base_vha );
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if (ret != QLA_SUCCESS ) {
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ql_log (ql_log_fatal , base_vha , 0x9002 ,
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"The device failed to resume I/O from slot/link_reset.\n" );
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}
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-
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- ha -> flags .eeh_busy = 0 ;
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}
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static void
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