@@ -55,7 +55,17 @@ module axi_id_serialize #(
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// / Request struct type of the AXI4+ATOP master port
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parameter type mst_req_t = logic ,
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// / Response struct type of the AXI4+ATOP master port
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- parameter type mst_resp_t = logic
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+ parameter type mst_resp_t = logic ,
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+ // / A custom offset (modulo `AxiMstPortMaxUniqIds`, ignored for input IDs remapped through
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+ // / `IdMap`) for the assigned output IDs.
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+ parameter int unsigned MstIdBaseOffset = 32'd0 ,
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+ // / Explicit input-output ID map. If an input ID `id` does not appear in this mapping (default),
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+ // / it is simply mapped to the output ID `id % AxiMstPortMaxUniqIds`. If `id` appears in more
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+ // / than one entry, it is matched to the *last* matching entry's output ID.
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+ // / Number of Entries in the explicit ID map (default: None)
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+ parameter int unsigned IdMapNumEntries = 32'd0 ,
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+ // / Explicit ID map; index [0] in each entry is the input ID to match, index [1] the output ID.
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+ parameter int unsigned IdMap [IdMapNumEntries- 1 : 0 ][0 : 1 ] = '{ default: '{ 32'b0 , 32'b0 }}
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) (
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// / Rising-edge clock of both ports
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input logic clk_i,
@@ -143,9 +153,27 @@ module axi_id_serialize #(
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// / R channel at master port
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`AXI_TYPEDEF_R_CHAN_T (mst_r_t, data_t, mst_id_t, user_t)
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+ // / Type for slave ID map
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+ typedef mst_id_t [2 ** AxiSlvPortIdWidth- 1 : 0 ] slv_id_map_t ;
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+
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+ // / Resolve target output ID for each possible input ID as a parameter
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+ function automatic slv_id_map_t map_slv_ids ();
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+ slv_id_map_t ret = '0 ;
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+ // Populate output with default mapping, including `MstIdBaseOffset`
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+ for (int unsigned i = 0 ; i < 2 ** AxiSlvPortIdWidth; ++ i)
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+ ret[i] = (i + MstIdBaseOffset) % AxiMstPortMaxUniqIds;
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+ // For each explicitly mapped input ID, set the desired output ID
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+ for (int unsigned i = 0 ; i < IdMapNumEntries; ++ i)
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+ ret[IdMap[i][0 ]] = IdMap[i][1 ];
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+ return ret;
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+ endfunction
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+
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+ // / Input-to-output ID map used
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+ localparam slv_id_map_t SlvIdMap = map_slv_ids ();
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+
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select_t slv_aw_select, slv_ar_select;
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- assign slv_aw_select = select_t ' (slv_req_i.aw.id % AxiMstPortMaxUniqIds); // TODO: customizable base
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- assign slv_ar_select = select_t ' (slv_req_i.ar.id % AxiMstPortMaxUniqIds );
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+ assign slv_aw_select = select_t ' (SlvIdMap[ slv_req_i.aw.id]);
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+ assign slv_ar_select = select_t ' (SlvIdMap[ slv_req_i.ar.id] );
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slv_req_t [AxiMstPortMaxUniqIds- 1 : 0 ] to_serializer_reqs;
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slv_resp_t [AxiMstPortMaxUniqIds- 1 : 0 ] to_serializer_resps;
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