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How about getting rid of the two UART pins (no need to waste those as they are only necessary for debugging)?
Also, there are RP2040 boards that expose all GPIOs (e.g., Pimoroni PGA2040 or the violet "Ultimate" boards available on Aliexpress). With those, 30 digital channels would be possible (if not using the shared analog inputs).
However, the lval<<=11, lval>>=11 dance in the firmware disallows that.
Wouldn't it be better to put that masking in libsigrock (why is it even necessary - because of RLE?)?
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How about getting rid of the two UART pins (no need to waste those as they are only necessary for debugging)?
Also, there are RP2040 boards that expose all GPIOs (e.g., Pimoroni PGA2040 or the violet "Ultimate" boards available on Aliexpress). With those, 30 digital channels would be possible (if not using the shared analog inputs).
However, the
lval<<=11, lval>>=11
dance in the firmware disallows that.Wouldn't it be better to put that masking in libsigrock (why is it even necessary - because of RLE?)?
The text was updated successfully, but these errors were encountered: