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// INFO ------------------------------------------------------------------------
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// Calculates counter/address width based on specified vector/RAM depth
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//
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+ // see also: http://www.sunburst-design.com/papers/CummingsHDLCON2001_Verilog2001.pdf
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+ //
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+ // Compared with system function $clog2():
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+ // =======================================
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+ // $clog2(0) = 0; clogb2(0) = 0;
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+ // $clog2(1) = 0; clogb2(1) = 1;
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+ // $clog2(2) = 1; clogb2(2) = 2;
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+ // $clog2(3) = 2; clogb2(3) = 2;
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+ // $clog2(4) = 2; clogb2(4) = 3;
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+ // $clog2(5) = 3; clogb2(5) = 3;
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+ // $clog2(6) = 3; clogb2(6) = 3;
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+ // $clog2(7) = 3; clogb2(7) = 3;
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+ // $clog2(8) = 3; clogb2(8) = 4;
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+ // $clog2(9) = 4; clogb2(9) = 4;
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+ // $clog2(10)= 4; clogb2(10)= 4;
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+ // $clog2(11)= 4; clogb2(11)= 4;
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+ // $clog2(12)= 4; clogb2(12)= 4;
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+ // $clog2(13)= 4; clogb2(13)= 4;
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+ // $clog2(14)= 4; clogb2(14)= 4;
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+ // $clog2(15)= 4; clogb2(15)= 4;
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+ // $clog2(16)= 4; clogb2(16)= 5;
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+ //
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// Function should be instantiated inside a module
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// But you are free to call it from anywhere by its hierarchical name
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//
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//
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function integer clogb2 ;
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- input integer depth;
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+ input [ 31 : 0 ] depth;
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for ( clogb2= 0 ; depth> 0 ; clogb2= clogb2+ 1 ) begin
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depth = depth >> 1 ;
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end
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endfunction
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