Purge assertions in codebase (Xilinx#922)

* Purge assertions in codebase

* Fixup faulty error condition

* Purge assertions

* Fixup typo

* Purge assertions

* Purge assertions

* Purge assertions

* Fixup typo

* Purge assertions

Author: erwei-xilinx

mlir/include/air/Util/Dependency.h

@@ -364,8 +364,10 @@ class dependencyTracer {
       dep_tracing_mode = 'w';
     else if (dep_type == "WAW/WAR")
       dep_tracing_mode = 'n';
-    else
-      assert(false && "Unknown dependency type");
+    else {
+      sink_air_op->emitOpError("Unknown dependency type.");
+      return;
+    }
 
     // Detect deps
     for (auto operand : operands) {

mlir/lib/Conversion/AIRLoweringPass.cpp

@@ -485,7 +485,11 @@ AIRChannelInterfaceToAIRRtConversionImpl(OpBuilder builder,
   if (!launch) {
     if (auto for_op = thisOp->getParentOfType<scf::ForOp>()) {
       // Broadcast channel control loop
-      assert(theOtherOp->hasAttr("tile"));
+      if (!theOtherOp->hasAttr("tile")) {
+        theOtherOp->emitOpError(
+            "missing 'tile' attribute as compile-time flag.");
+        return nullptr;
+      }
       ArrayAttr tiles = theOtherOp->getAttrOfType<ArrayAttr>("tile");
       auto tile_dict = llvm::cast<DictionaryAttr>(tiles[0]);
       auto row = llvm::cast<IntegerAttr>(tile_dict.get("row")).getInt();
@@ -527,8 +531,11 @@ AIRChannelInterfaceToAIRRtConversionImpl(OpBuilder builder,
     strides.push_back(one_idx);
   }
   // Stride field implicit last element one
-  [[maybe_unused]] auto lastStrideConst = getConstantIntValue(strides.back());
-  assert(lastStrideConst && "the last stride is not static");
+  auto lastStrideConst = getConstantIntValue(strides.back());
+  if (!lastStrideConst) {
+    thisOp->emitOpError("last stride is not static.");
+    return nullptr;
+  }
 
   strides.pop_back();
   while (offsets.size() < 4) {
@@ -863,13 +870,27 @@ LogicalResult ScfParToAffineForConversion(Operation *op) {
 
   llvm::SmallSet<Operation *, 8> erased;
   f.walk([&](scf::ParallelOp scf_par) {
-    for (auto v : scf_par.getLowerBound()) {
-      assert(dyn_cast<arith::ConstantIndexOp>(v.getDefiningOp()).value() == 0);
-      (void)v;
+    if (!llvm::all_of(scf_par.getLowerBound(), [](Value v) {
+          auto constV = getConstantIntValue(v);
+          if (!constV)
+            return false;
+          if (*constV != 0)
+            return false;
+          return true;
+        })) {
+      scf_par->emitOpError("has non-zero lower bound.");
+      return;
     }
-    for (auto v : scf_par.getStep()) {
-      assert(dyn_cast<arith::ConstantIndexOp>(v.getDefiningOp()).value() == 1);
-      (void)v;
+    if (!llvm::all_of(scf_par.getStep(), [](Value v) {
+          auto constV = getConstantIntValue(v);
+          if (!constV)
+            return false;
+          if (*constV != 1)
+            return false;
+          return true;
+        })) {
+      scf_par->emitOpError("has non-unit step size.");
+      return;
     }
     std::vector<int> par_sizes = {};
     for (auto v : scf_par.getUpperBound())
@@ -1177,14 +1198,14 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
       remapLoop(src_for, dst_for, remap);
     } else if (src_par && dst_par) {
       remapLoop(src_par, dst_par, remap);
-    } else
-      assert(false);
+    }
   }
 
   // Get parent loop nest
   std::vector<Operation *> getParentLoopNest(Operation *op,
                                              Operation *outermost) const {
-    assert(op);
+    if (!op)
+      return std::vector<Operation *>();
     std::vector<Operation *> output;
     for (auto parent = op->getParentOp(); parent != outermost;
          parent = parent->getParentOp()) {
@@ -1283,11 +1304,14 @@ class AIRLoweringPass : public air::impl::AIRLoweringBase<AIRLoweringPass> {
         for (unsigned i = 1; i < bucket.size(); i++) {
           IRMapping remap;
           Operation *chan_op = getInnerMostMemcpyFromLoopNest(bucket[i]);
-          assert(chan_op);
+          if (!chan_op) {
+            func->emitOpError("memcpy in innermost loop body not found.");
+            return;
+          }
           auto src_loop_nest = getParentLoopNest(chan_op, bucket[i]);
-          assert(src_loop_nest.size() == dst_loop_nest.size());
-          for (unsigned i = 0; i < src_loop_nest.size(); i++) {
-            remapLoop(src_loop_nest[i], dst_loop_nest[i], remap);
+          for (auto [src_loop, dst_loop] :
+               llvm::zip_equal(src_loop_nest, dst_loop_nest)) {
+            remapLoop(src_loop, dst_loop, remap);
           }
           auto yield_op = dst_loop_nest[0]
                               ->getRegions()

mlir/lib/Conversion/AIRRtToNpuPass.cpp

@@ -492,8 +492,7 @@ bool violatesAIE2WrapLimit(airrt::DmaMemcpyNdOp dma) {
       // Detected wrap that goes beyond the AIE2 hardware limit.
       if (*const_val >= AIE2_WRAP_UPPER_BOUNDS[i])
         return true;
-    } else
-      assert(false && "has non-static wrap");
+    }
   }
   return false;
 }
@@ -1177,8 +1176,6 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
           return;
         }
       });
-      if (!containsOnlyWaitAll)
-        assert(false && "found scf.parallel op at this IR, NYI");
       builder.setInsertionPoint(par_op);
       auto newWaitAll = builder.create<airrt::WaitAllOp>(
           par_op->getLoc(), airrt::EventType::get(par_op->getContext()),
@@ -1364,11 +1361,15 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
         int srcRowIndex = srcTile.rowIndex();
         int dstColIndex = destTile.colIndex();
         int dstRowIndex = destTile.rowIndex();
-        assert((target_model.isCoreTile(srcColIndex, srcRowIndex) ||
-                target_model.isMemTile(srcColIndex, srcRowIndex)) &&
-               "unsupported trace src");
-        assert(target_model.isShimNOCTile(dstColIndex, dstRowIndex) &&
-               "unsupported trace dest");
+        if (!target_model.isCoreTile(srcColIndex, srcRowIndex) &&
+            !target_model.isMemTile(srcColIndex, srcRowIndex)) {
+          pktFlow->emitOpError("unsupported trace src.");
+          return;
+        }
+        if (!target_model.isShimNOCTile(dstColIndex, dstRowIndex)) {
+          pktFlow->emitOpError("unsupported trace dest.");
+          return;
+        }
         int pkt_type = 0;
         if (target_model.isMemTile(srcColIndex, srcRowIndex))
           pkt_type = 3;
@@ -1452,7 +1453,10 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
         if (chanToIdMap.count(dstColIndex) == 0)
           chanToIdMap[dstColIndex] = 15;
         int bdID = chanToIdMap[dstColIndex];
-        assert(bdID >= 4 && "run out of bd_id");
+        if (bdID < 4) {
+          pktFlow->emitOpError("runs out of bd_id.");
+          return;
+        }
 
         builder.create<AIEX::NpuWriteBdOp>(
             builder.getUnknownLoc(), dstColIndex, bdID, buff_size, buff_offset,
@@ -1479,8 +1483,10 @@ struct AIRRtToNpuPass : public impl::AIRRtToNpuBase<AIRRtToNpuPass> {
           address = 0x1D204;
         else if (destPort.channel == 1)
           address = 0x1D20C;
-        else
-          assert(false && "unknown trace dest");
+        else {
+          pktFlow->emitOpError("unknown trace dest.");
+          return;
+        }
         builder.create<AIEX::NpuWrite32Op>(
             builder.getUnknownLoc(), address, bdID, nullptr,
             builder.getIntegerAttr(builder.getI32Type(), dstColIndex),

mlir/lib/Conversion/AIRToAIEPass.cpp

@@ -238,9 +238,6 @@ void outlineAIECores(OpBuilder &builder, AIE::DeviceOp aie_device,
       // mem
       builder.setInsertionPoint(core);
 
-      assert((h.getBody().getBlocks().size() == 1) &&
-             "Launch body can only contain one Block");
-
       // generate the aie.core body
       //
       OpBuilder core_builder(core);
@@ -724,7 +721,6 @@ struct LowerScfTokenPattern : public OpRewritePattern<scf::ForOp> {
 
     // remove air.async.token from the yield op
     auto yield = new_region.back().getTerminator();
-    assert(isa<scf::YieldOp>(yield));
     rewriter.setInsertionPoint(yield);
     SmallVector<Value, 4> yield_operands;
     SmallVector<Value, 4> token_operands;
@@ -831,7 +827,10 @@ struct AllocL2BuffersPattern : public OpRewritePattern<memref::AllocOp> {
       return failure();
 
     // Allocation of L2 memrefs in segment to buffer ops
-    assert(memrefToTileMap.count(alloc));
+    if (!memrefToTileMap.count(alloc)) {
+      alloc->emitOpError("alloc not found in memrefToTileMap.");
+      return failure();
+    }
     AIE::TileOp tile = memrefToTileMap[alloc];
     if (!tile)
       return failure();
@@ -2076,7 +2075,10 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
         memcpy_flows.push_back(flow);
       } else if (auto putget = dyn_cast<air::ChannelInterface>(o)) {
         auto chan = air::getChannelDeclarationThroughSymbol(putget);
-        assert(chan);
+        if (!chan) {
+          putget->emitOpError("failed to get air.channel declaration.");
+          return failure();
+        }
         std::string chan_name = putget.getChanName().str();
         // Check if new pair
         bool found_in_flows = false;
@@ -2444,9 +2446,11 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
                            tile_side_memcpy.getOperation())) {
           memref_ty =
               llvm::cast<MemRefType>(tile_side_chan.getMemref().getType());
+        } else {
+          op->emitOpError(
+              "Memref type for shim DMA allocation not initialized!");
+          return;
         }
-        assert(memref_ty != nullptr &&
-               "Memref type for shim DMA allocation not initialized!");
 
         // Label airrt.dmamemcpynd ops with symbolic ref. to shimdmaalloc op
         auto dmaop_labeled = labelAIRDmaOpsWithMetadata(
@@ -2950,7 +2954,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
       for (auto &alloc : tileDmaAlloc.mm2s_allocs) {
         if (alloc.foundAlloc(x, y)) {
           for (auto o : alloc.memcpyOps) {
-            assert(o);
+            if (!o)
+              continue;
             auto memcpyOpIf = dyn_cast<air::MemcpyInterface>(o);
             if (!memcpyOpIf)
               return o->emitOpError("does not have air::MemcpyInterface");
@@ -2962,7 +2967,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
       for (auto &alloc : tileDmaAlloc.s2mm_allocs) {
         if (alloc.foundAlloc(x, y)) {
           for (auto o : alloc.memcpyOps) {
-            assert(o);
+            if (!o)
+              continue;
             auto memcpyOpIf = dyn_cast<air::MemcpyInterface>(o);
             if (!memcpyOpIf)
               return o->emitOpError("does not have air::MemcpyInterface");
@@ -3038,7 +3044,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
       if (tile.isShimTile())
         push_back_if_unique<AIE::TileOp>(shimtiles, tile);
       else {
-        assert(false);
+        tile->emitOpError(
+            "tile is logged for shim DMA allocation, but is not shim tile.");
         return failure();
       }
     }
@@ -3047,7 +3054,8 @@ class AIRToAIEPass : public air::impl::AIRToAIEBase<AIRToAIEPass> {
       if (tile.isMemTile())
         push_back_if_unique<AIE::TileOp>(memTileTiles, tile);
       else {
-        assert(false);
+        tile->emitOpError(
+            "tile is logged for memtile DMA allocation, but is not memtile.");
         return failure();
       }
     }