MAME 0.116

Author: mamedev

src/emu/cpu/adsp2100/2100ops.c

@@ -375,6 +375,7 @@ static void wr_px(INT32 val)    { adsp2100.px = val; }
 static void wr_ifc(INT32 val)
 {
 	adsp2100.ifc = val;
+#if (HAS_ADSP2181)
 	if (chip_type >= CHIP_TYPE_ADSP2181)
 	{
 		/* clear timer */
@@ -395,6 +396,7 @@ static void wr_ifc(INT32 val)
 		if (val & 0x8000) adsp2100.irq_latch[ADSP2181_IRQ2] = 1;
 	}
 	else
+#endif
 	{
 		/* clear timer */
 		if (val & 0x002) adsp2100.irq_latch[ADSP2101_IRQ0] = 0;

src/emu/cpu/adsp2100/adsp2100.c

@@ -453,6 +453,7 @@ static void check_irqs(void)
 {
 	UINT8 check;
 
+#if (HAS_ADSP2181)
 	if (chip_type >= CHIP_TYPE_ADSP2181)
 	{
 		/* check IRQ2 */
@@ -502,7 +503,9 @@ static void check_irqs(void)
 		if (check && adsp2181_generate_irq(ADSP2181_TIMER, 9))
 			return;
 	}
-	else if (chip_type >= CHIP_TYPE_ADSP2101)
+	else
+#endif
+	if (chip_type >= CHIP_TYPE_ADSP2101)
 	{
 		/* check IRQ2 */
 		check = (adsp2100.icntl & 4) ? adsp2100.irq_latch[ADSP2101_IRQ2] : adsp2100.irq_state[ADSP2101_IRQ2];
@@ -587,6 +590,7 @@ static void adsp2100_get_context(void *dst)
 }
 
 
+#if (HAS_ADSP2100)
 static void adsp2100_set_context(void *src)
 {
 	/* copy the context */
@@ -602,6 +606,7 @@ static void adsp2100_set_context(void *src)
 	/* check for IRQs */
 	check_irqs();
 }
+#endif
 
 
 
@@ -1929,8 +1934,8 @@ static void adsp21xx_get_info(UINT32 state, cpuinfo *info)
 
 		/* --- the following bits of info are returned as pointers to data or functions --- */
 		case CPUINFO_PTR_SET_INFO:						/* set per CPU */						break;
+		case CPUINFO_PTR_SET_CONTEXT:					/* set per CPU */						break;
 		case CPUINFO_PTR_GET_CONTEXT:					info->getcontext = adsp2100_get_context; break;
-		case CPUINFO_PTR_SET_CONTEXT:					info->setcontext = adsp2100_set_context; break;
 		case CPUINFO_PTR_INIT:							info->init = adsp2100_init;				break;
 		case CPUINFO_PTR_RESET:							info->reset = adsp2100_reset;			break;
 		case CPUINFO_PTR_EXIT:							info->exit = adsp2100_exit;				break;
@@ -2059,6 +2064,17 @@ static void adsp21xx_get_info(UINT32 state, cpuinfo *info)
 	}
 }
 
+void adsp21xx_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
+{
+	/* see how many words we need to copy */
+	int pagelen = (srcdata[(3)] + 1) * 8;
+	int i;
+	for (i = 0; i < pagelen; i++)
+	{
+		UINT32 opcode = (srcdata[(i*4+0)] << 16) | (srcdata[(i*4+1)] << 8) | srcdata[(i*4+2)];
+		dstdata[i] = opcode;
+	}
+}
 
 #if (HAS_ADSP2100)
 /**************************************************************************
@@ -2219,14 +2235,7 @@ static void adsp2104_set_context(void *src)
 
 void adsp2104_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
 {
-	/* see how many words we need to copy */
-	int pagelen = (srcdata[(3)] + 1) * 8;
-	int i;
-	for (i = 0; i < pagelen; i++)
-	{
-		UINT32 opcode = (srcdata[(i*4+0)] << 16) | (srcdata[(i*4+1)] << 8) | srcdata[(i*4+2)];
-		dstdata[i] = opcode;
-	}
+	adsp21xx_load_boot_data(srcdata, dstdata);
 }
 
 static void adsp2104_set_info(UINT32 state, cpuinfo *info)
@@ -2314,7 +2323,7 @@ static void adsp2105_set_context(void *src)
 
 void adsp2105_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
 {
-	adsp2104_load_boot_data(srcdata, dstdata);
+	adsp21xx_load_boot_data(srcdata, dstdata);
 }
 
 static void adsp2105_set_info(UINT32 state, cpuinfo *info)
@@ -2396,7 +2405,7 @@ static void adsp2115_set_context(void *src)
 
 void adsp2115_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
 {
-	adsp2104_load_boot_data(srcdata, dstdata);
+	adsp21xx_load_boot_data(srcdata, dstdata);
 }
 
 static void adsp2115_set_info(UINT32 state, cpuinfo *info)
@@ -2484,7 +2493,7 @@ static void adsp2181_set_context(void *src)
 
 void adsp2181_load_boot_data(UINT8 *srcdata, UINT32 *dstdata)
 {
-	adsp2104_load_boot_data(srcdata, dstdata);
+	adsp21xx_load_boot_data(srcdata, dstdata);
 }
 
 static void adsp2181_set_info(UINT32 state, cpuinfo *info)

src/emu/cpu/adsp2100/adsp2100.h

@@ -56,18 +56,17 @@ enum
     PUBLIC FUNCTIONS
 ***************************************************************************/
 
-#if (HAS_ADSP2100)
 #define ADSP2100_IRQ0		0		/* IRQ0 */
 #define ADSP2100_SPORT1_RX	0		/* SPORT1 receive IRQ */
 #define ADSP2100_IRQ1		1		/* IRQ1 */
 #define ADSP2100_SPORT1_TX	1		/* SPORT1 transmit IRQ */
 #define ADSP2100_IRQ2		2		/* IRQ2 */
 #define ADSP2100_IRQ3		3		/* IRQ3 */
 
+#if (HAS_ADSP2100)
 extern void adsp2100_get_info(UINT32 state, cpuinfo *info);
 #endif
 
-#if (HAS_ADSP2101)
 /**************************************************************************
  * ADSP2101 section
  **************************************************************************/
@@ -81,6 +80,7 @@ extern void adsp2100_get_info(UINT32 state, cpuinfo *info);
 #define ADSP2101_SPORT0_TX	4		/* SPORT0 transmit IRQ */
 #define ADSP2101_TIMER		5		/* internal timer IRQ */
 
+#if (HAS_ADSP2101)
 extern void adsp2101_get_info(UINT32 state, cpuinfo *info);
 #endif
 

src/emu/cpu/alph8201/alph8201.c

@@ -946,7 +946,6 @@ static void alpha8xxx_get_info(UINT32 state, cpuinfo *info)
 		case CPUINFO_PTR_INIT:							info->init = ALPHA8201_init;			break;
 		case CPUINFO_PTR_RESET:							info->reset = ALPHA8201_reset;			break;
 		case CPUINFO_PTR_EXIT:							info->exit = ALPHA8201_exit;			break;
-		case CPUINFO_PTR_EXECUTE:						info->execute = ALPHA8201_execute;		break;
 		case CPUINFO_PTR_BURN:							info->burn = NULL;						break;
 #ifdef MAME_DEBUG
 		case CPUINFO_PTR_DISASSEMBLE:					info->disassemble = ALPHA8201_dasm;		break;

src/emu/cpu/cpu.mak

@@ -567,14 +567,14 @@ CPUDEFS += -DHAS_PENTIUM=$(if $(filter PENTIUM,$(CPUS)),1,0)
 CPUDEFS += -DHAS_MEDIAGX=$(if $(filter MEDIAGX,$(CPUS)),1,0)
 
 ifneq ($(filter I86 I88 I186 I188,$(CPUS)),)
-OBJDIRS += $(CPUOBJ)/i86
+OBJDIRS += $(CPUOBJ)/i86 $(CPUOBJ)/i386
 CPUOBJS += $(CPUOBJ)/i86/i86.o
 DBGOBJS += $(CPUOBJ)/i386/i386dasm.o
 endif
 
 
 ifneq ($(filter I286,$(CPUS)),)
-OBJDIRS += $(CPUOBJ)/i86
+OBJDIRS += $(CPUOBJ)/i86 $(CPUOBJ)/i386
 CPUOBJS += $(CPUOBJ)/i86/i286.o
 DBGOBJS += $(CPUOBJ)/i386/i386dasm.o
 endif
@@ -737,7 +737,7 @@ $(CPUOBJ)/pic16c5x/pic16c5x.o:	$(CPUSRC)/pic16c5x/pic16c5x.c \
 CPUDEFS += -DHAS_R3000=$(if $(filter R3000,$(CPUS)),1,0)
 
 ifneq ($(filter R3000,$(CPUS)),)
-OBJDIRS += $(CPUOBJ)/r3000
+OBJDIRS += $(CPUOBJ)/mips
 CPUOBJS += $(CPUOBJ)/mips/r3000.o
 DBGOBJS += $(CPUOBJ)/mips/r3kdasm.o
 endif
@@ -1094,13 +1094,13 @@ CPUDEFS += -DHAS_V30MZ=$(if $(filter V30MZ,$(CPUS)),1,0)
 CPUDEFS += -DHAS_V33=$(if $(filter V33,$(CPUS)),1,0)
 
 ifneq ($(filter V20 V30 V33,$(CPUS)),)
-OBJDIRS += $(CPUOBJ)/nec
+OBJDIRS += $(CPUOBJ)/nec $(CPUOBJ)/i386
 CPUOBJS += $(CPUOBJ)/nec/nec.o
 DBGOBJS += $(CPUOBJ)/i386/i386dasm.o
 endif
 
 ifneq ($(filter V30MZ,$(CPUS)),)
-OBJDIRS += $(CPUOBJ)/v30mz
+OBJDIRS += $(CPUOBJ)/v30mz $(CPUOBJ)/i386
 CPUOBJS += $(CPUOBJ)/v30mz/v30mz.o
 DBGOBJS += $(CPUOBJ)/i386/i386dasm.o
 endif
@@ -1572,7 +1572,7 @@ $(CPUOBJ)/z80/z80.o:	$(CPUSRC)/z80/z80.c \
 CPUDEFS += -DHAS_Z180=$(if $(filter Z180,$(CPUS)),1,0)
 
 ifneq ($(filter Z180,$(CPUS)),)
-OBJDIRS += $(CPUOBJ)/z180
+OBJDIRS += $(CPUOBJ)/z180 $(CPUOBJ)/z80
 CPUOBJS += $(CPUOBJ)/z180/z180.o $(CPUOBJ)/z80/z80daisy.o
 DBGOBJS += $(CPUOBJ)/z180/z180dasm.o
 endif

src/emu/cpu/i8051/i8051.c

@@ -1546,9 +1546,11 @@ INLINE UINT8 check_interrupts(void)
 		case V_RITI:
 			// no flags are cleared, TI and RI remain set until reset by software
 			break;
+#if (HAS_I8052 || HAS_I8752)
 		case V_TF2:
 			// no flags are cleared according to manual
 			break;
+#endif
 	}
 
 	//Clear vars.. (these are part of the 8051 structure for speed, so we don't have to dynamically allocate space each time)
@@ -2209,7 +2211,7 @@ INLINE void	update_serial(int cyc)
 /****************************************************************************
  * 8752 Section
  ****************************************************************************/
-#if (HAS_I8752)
+#if (HAS_I8052 || HAS_I8752)
 void i8752_init (int index, int clock, const void *config, int (*irqcallback)(int))	{ i8051_init(index, clock, config, irqcallback); }
 void i8752_reset (void)
 {
@@ -2493,6 +2495,7 @@ void i8051_get_info(UINT32 state, cpuinfo *info)
 	}
 }
 
+#if (HAS_I8052)
 void i8052_get_info(UINT32 state, cpuinfo *info)
 {
 	switch (state)
@@ -2509,7 +2512,9 @@ void i8052_get_info(UINT32 state, cpuinfo *info)
 		default:										i8051_get_info(state, info);			break;
 	}
 }
+#endif
 
+#if (HAS_I8751)
 void i8751_get_info(UINT32 state, cpuinfo *info)
 {
 	switch (state)
@@ -2519,7 +2524,9 @@ void i8751_get_info(UINT32 state, cpuinfo *info)
 		default:										i8051_get_info(state, info);			break;
 	}
 }
+#endif
 
+#if (HAS_I8752)
 void i8752_get_info(UINT32 state, cpuinfo *info)
 {
 	switch (state)
@@ -2536,4 +2543,4 @@ void i8752_get_info(UINT32 state, cpuinfo *info)
 		default:										i8051_get_info(state, info);			break;
 	}
 }
-
+#endif

src/emu/cpu/jaguar/jaguar.c

@@ -380,10 +380,9 @@ static void init_tables(void)
 
 	/* allocate the mirror table */
 	if (!mirror_table)
-		mirror_table = malloc(65536 * sizeof(mirror_table[0]));
+		mirror_table = malloc_or_die(65536 * sizeof(mirror_table[0]));
 
 	/* fill in the mirror table */
-	if (mirror_table)
 		for (i = 0; i < 65536; i++)
 			mirror_table[i] = ((i >> 15) & 0x0001) | ((i >> 13) & 0x0002) |
 			                  ((i >> 11) & 0x0004) | ((i >> 9)  & 0x0008) |
@@ -396,10 +395,9 @@ static void init_tables(void)
 
 	/* allocate the condition table */
 	if (!condition_table)
-		condition_table = malloc(32 * 8 * sizeof(condition_table[0]));
+		condition_table = malloc_or_die(32 * 8 * sizeof(condition_table[0]));
 
 	/* fill in the condition table */
-	if (condition_table)
 		for (i = 0; i < 8; i++)
 			for (j = 0; j < 32; j++)
 			{

src/emu/cpu/m6502/6502dasm.c

@@ -740,12 +740,10 @@ static unsigned internal_m6502_dasm(const struct op6502_info *opinfo, char *buff
 	return (pc - PC) | flags;
 }
 
-#if (HAS_M6502)
 unsigned m6502_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
 {
 	return internal_m6502_dasm(op6502, buffer, pc, oprom, opram);
 }
-#endif
 
 #if (HAS_M65SC02)
 unsigned m65sc02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
@@ -754,7 +752,7 @@ unsigned m65sc02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *
 }
 #endif
 
-#if (HAS_M65C02)
+#if (HAS_M65C02||HAS_M65SC02||HAS_DECO16)
 unsigned m65c02_dasm(char *buffer, offs_t pc, const UINT8 *oprom, const UINT8 *opram)
 {
 	return internal_m6502_dasm(op65c02, buffer, pc, oprom, opram);

src/emu/cpu/m6502/m6502.c

@@ -24,6 +24,11 @@
 /* 10.March   2000 PeT added 6502 set overflow input line */
 /* 13.September 2000 PeT N2A03 jmp indirect */
 
+#if ((HAS_M65SC02 || HAS_DECO16) && !HAS_M65C02)
+#undef HAS_M65C02
+#define HAS_M65C02 1
+#endif
+
 #include "debugger.h"
 #include "m6502.h"
 #include "ops02.h"

src/emu/cpu/m6502/m6509.c

@@ -372,7 +372,7 @@ void m6509_get_info(UINT32 state, cpuinfo *info)
 		case CPUINFO_PTR_EXECUTE:						info->execute = m6509_execute;			break;
 		case CPUINFO_PTR_BURN:							info->burn = NULL;						break;
 #ifdef MAME_DEBUG
-		case CPUINFO_PTR_DISASSEMBLE:					info->disassemble = m6510_dasm;			break;
+		case CPUINFO_PTR_DISASSEMBLE:					info->disassemble = m6502_dasm;			break;
 #endif
 		case CPUINFO_PTR_INSTRUCTION_COUNTER:			info->icount = &m6502_ICount;			break;
 		case CPUINFO_PTR_INTERNAL_MEMORY_MAP:			info->internal_map = construct_map_m6509_mem; break;

src/emu/cpu/m6800/6800tbl.c

@@ -284,7 +284,7 @@ subb_ex,cmpb_ex,sbcb_ex,illegal,andb_ex,bitb_ex,ldb_ex, stb_ex,
 eorb_ex,adcb_ex,orb_ex, addb_ex,illegal,illegal,ldx_ex, stx_ex
 };
 
-#if (HAS_M6803)
+#if (HAS_M6801||HAS_M6803)
 static void (*m6803_insn[0x100])(void) = {
 illegal,nop,	illegal,illegal,lsrd,	asld,	tap,	tpa,
 inx,	dex,	clv,	sev,	clc,	sec,	cli,	sei,

src/emu/cpu/m6800/m6800.c

@@ -1658,6 +1658,9 @@ void hd63701_trap_pc(void)
 	TAKE_TRAP;
 }
 
+static READ8_HANDLER( m6803_internal_registers_r );
+static WRITE8_HANDLER( m6803_internal_registers_w );
+
 READ8_HANDLER( hd63701_internal_registers_r )
 {
 	return m6803_internal_registers_r(offset);

src/emu/cpu/mips/mips3drc.c

@@ -452,7 +452,7 @@ static void mips3_reset(int bigendian, int mips4, UINT32 prid)
     RM7000 = 0x2700
 */
 
-#if (HAS_R4600)
+#if (HAS_R4600||HAS_R4650)
 static void r4600be_reset(void)
 {
 	mips3_reset(1, 0, 0x2000);

src/emu/cpu/powerpc/drc_ops.c

@@ -3740,7 +3740,9 @@ static UINT32 recompile_dsa(drc_core *drc, UINT32 op)
 
 	return RECOMPILE_SUCCESSFUL_CP(1,4);
 }
+#endif /* HAS_PPC602 */
 
+#if (HAS_PPC602 || HAS_MPC8240)
 static UINT32 recompile_tlbli(drc_core *drc, UINT32 op)
 {
 	return RECOMPILE_SUCCESSFUL_CP(1,4);
@@ -3750,5 +3752,5 @@ static UINT32 recompile_tlbld(drc_core *drc, UINT32 op)
 {
 	return RECOMPILE_SUCCESSFUL_CP(1,4);
 }
-#endif /* HAS_PPC602 */
+#endif
 

src/emu/cpu/powerpc/ppcdrc.c

@@ -19,6 +19,8 @@
 #if (HAS_PPC603)
 static void ppcdrc603_init(int index, int clock, const void *_config, int (*irqcallback)(int));
 static void ppcdrc603_exit(void);
+#endif
+#if (HAS_PPC603 || HAS_MPC8240)
 static void ppcdrc603_reset(void);
 static int ppcdrc603_execute(int cycles);
 static void ppcdrc603_set_irq_line(int irqline, int state);
@@ -1207,7 +1209,9 @@ static void ppcdrc603_exit(void)
 #endif
 	drc_exit(ppc.drc);
 }
+#endif
 
+#if (HAS_PPC603 || HAS_MPC8240)
 static void ppcdrc603_reset(void)
 {
 	ppc.pc = ppc.npc = 0xfff00100;