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Report CHERI violations on stderr
Report the first occurrence of each CHERI violation on stderr and ensure that this is promptly visible, as a development aid and to help catch the execution of legacy software on CHERI- enabled hardware.
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dv/verilator/top_verilator.sv

+49-6
Original file line numberDiff line numberDiff line change
@@ -10,8 +10,13 @@ module top_verilator (input logic clk_i, rst_ni);
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localparam int unsigned SysClkFreq = 30_000_000;
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// HyperRAM clock frequency.
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localparam int unsigned HRClkFreq = 100_000_000;
13-
localparam BaudRate = 921_600;
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localparam EnableCHERI = 1'b1;
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localparam int unsigned BaudRate = 921_600;
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localparam bit EnableCHERI = 1'b1;
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// Number of CHERI error LEDs.
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localparam int unsigned CheriErrWidth = 9;
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// The symbolic file descriptors are presently unknown to Verilator
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// (described in IEEE 1800-2012).
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localparam int unsigned STDERR = 32'h8000_0002;
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logic uart_sys_rx, uart_sys_tx;
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@@ -98,12 +103,50 @@ module top_verilator (input logic clk_i, rst_ni);
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rph_g16_ce2, rph_g8_ce0, rph_g7_ce1, ethmac_rst, ethmac_cs,
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usrLed};
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// Reporting of CHERI enable/disable and any exceptions that occur.
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wire [CheriErrWidth-1:0] cheri_err;
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logic [CheriErrWidth-1:0] cheri_errored;
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wire cheri_en;
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initial begin
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if (cheri_en) $display("Running with CHERI enabled");
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else $display("Running in legacy software mode");
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end
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always @(posedge clk_i or negedge rst_ni) begin
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if (!rst_ni) cheri_errored <= '0;
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else if (|(cheri_err & ~cheri_errored)) begin : cheri_err_reporting
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// Report the first occurrence of each exception by name.
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for (int unsigned e = 0; e < CheriErrWidth; e++) begin
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if (cheri_err[e] & !cheri_errored[e]) begin
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string name;
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case (e)
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0: name = "Bounds";
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1: name = "Tag";
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2: name = "Seal";
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3: name = "Permit Execute";
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4: name = "Permit Load";
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5: name = "Permit Store";
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6: name = "Permit Store Cap";
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7: name = "Permit Store Local Cap";
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8: name = "Permit Acc Sys Regs";
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default: name = "Unknown";
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endcase
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// Ensure that the output is visible promptly.
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$fdisplay(STDERR, "*** CHERI '%s' violation occurred *** at time %t", name, $time);
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$fflush(STDERR);
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// Remember that this error occurred; each error signal will be asserted many times
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// because they are intended to drive LEDs on the FPGA board and are thus modulated.
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cheri_errored <= cheri_errored | cheri_err;
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end
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end
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end
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end
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// Instantiating the Sonata System.
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sonata_system #(
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.GpiWidth ( 14 ),
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.GpoWidth ( 23 ),
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.PwmWidth ( 1 ),
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.CheriErrWidth ( 9 ),
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.CheriErrWidth ( CheriErrWidth ),
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.SysClkFreq ( SysClkFreq ),
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.HRClkFreq ( HRClkFreq ),
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.DisableHyperram ( DisableHyperram )
@@ -200,10 +243,10 @@ module top_verilator (input logic clk_i, rst_ni);
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.spi_mkr_tx_o ( ),
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.spi_mkr_sck_o( ),
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203-
.cheri_en_i (EnableCHERI),
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.cheri_en_i (EnableCHERI),
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// CHERI output
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.cheri_err_o(),
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.cheri_en_o (),
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.cheri_err_o (cheri_err),
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.cheri_en_o (cheri_en),
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// I2C bus 0
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.i2c0_scl_i (scl0),

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