[opentitanproxy] support bitstream programming over proxy

Signed-off-by: Gary Guo <[email protected]>

Author: nbdd0121

sw/host/ot_proxy/proto/src/lib.rs

@@ -40,6 +40,7 @@ pub enum Request {
     Spi { id: String, command: SpiRequest },
     I2c { id: String, command: I2cRequest },
     Emu { command: EmuRequest },
+    Fpga(FpgaRequest),
     Proxy(ProxyRequest),
 }
 
@@ -55,6 +56,7 @@ pub enum Response {
     Spi(SpiResponse),
     I2c(I2cResponse),
     Emu(EmuResponse),
+    Fpga(FgpaResponse),
     Proxy(ProxyResponse),
 }
 
@@ -376,6 +378,18 @@ pub enum EmuResponse {
     Stop,
 }
 
+#[derive(Serialize, Deserialize)]
+pub enum FpgaRequest {
+    LoadBitstream { bitstream: Vec<u8> },
+    ClearBitstream,
+}
+
+#[derive(Serialize, Deserialize)]
+pub enum FgpaResponse {
+    LoadBitstream,
+    ClearBitstream,
+}
+
 #[derive(Serialize, Deserialize)]
 pub enum ProxyRequest {
     Provides,

sw/host/ot_proxy/server/src/handler.rs

@@ -12,7 +12,7 @@ use std::sync::Arc;
 use std::task::{Context, Poll};
 use std::time::Duration;
 
-use opentitanlib::app::TransportWrapper;
+use opentitanlib::app::{NoProgressBar, TransportWrapper};
 use opentitanlib::bootstrap::Bootstrap;
 use opentitanlib::io::console::broadcast::WeakBroadcaster;
 use opentitanlib::io::console::{Broadcaster, ConsoleDevice};
@@ -25,10 +25,11 @@ use opentitanlib::transport::TransportError;
 use opentitanlib::util::serializable_error::SerializedError;
 use ot_proxy_proto::{
     BitbangEntryRequest, BitbangEntryResponse, DacBangEntryRequest, EmuRequest, EmuResponse,
-    GpioBitRequest, GpioBitResponse, GpioDacRequest, GpioDacResponse, GpioMonRequest,
-    GpioMonResponse, GpioRequest, GpioResponse, I2cRequest, I2cResponse, I2cTransferRequest,
-    I2cTransferResponse, Message, ProxyRequest, ProxyResponse, Request, Response, SpiRequest,
-    SpiResponse, SpiTransferRequest, SpiTransferResponse, UartRequest, UartResponse,
+    FgpaResponse, FpgaRequest, GpioBitRequest, GpioBitResponse, GpioDacRequest, GpioDacResponse,
+    GpioMonRequest, GpioMonResponse, GpioRequest, GpioResponse, I2cRequest, I2cResponse,
+    I2cTransferRequest, I2cTransferResponse, Message, ProxyRequest, ProxyResponse, Request,
+    Response, SpiRequest, SpiResponse, SpiTransferRequest, SpiTransferResponse, UartRequest,
+    UartResponse,
 };
 
 use super::{CommandHandler, Connection};
@@ -588,6 +589,18 @@ impl TransportCommandHandler {
                     }
                 }
             }
+            Request::Fpga(request) => match request {
+                FpgaRequest::LoadBitstream { bitstream } => {
+                    self.transport
+                        .fpga_ops()?
+                        .load_bitstream(bitstream, &NoProgressBar)?;
+                    Ok(Response::Fpga(FgpaResponse::LoadBitstream))
+                }
+                FpgaRequest::ClearBitstream => {
+                    self.transport.fpga_ops()?.clear_bitstream()?;
+                    Ok(Response::Fpga(FgpaResponse::ClearBitstream))
+                }
+            },
             Request::Proxy(command) => match command {
                 ProxyRequest::Provides => {
                     let provides_map = self.transport.provides_map()?.clone();

sw/host/ot_transports/proxy/src/lib.rs

@@ -29,10 +29,13 @@ use opentitanlib::io::gpio::{GpioBitbanging, GpioMonitoring, GpioPin};
 use opentitanlib::io::i2c::Bus;
 use opentitanlib::io::spi::Target;
 use opentitanlib::io::uart::Uart;
-use opentitanlib::transport::{Capabilities, Capability, ProxyOps, Transport, TransportError};
+use opentitanlib::transport::{
+    Capabilities, Capability, FpgaOps, ProgressIndicator, ProxyOps, Transport, TransportError,
+};
 use opentitanlib::util::serializable_error::SerializedError;
 use ot_proxy_proto::{
-    Message, ProxyRequest, ProxyResponse, Request, Response, UartRequest, UartResponse,
+    FgpaResponse, FpgaRequest, Message, ProxyRequest, ProxyResponse, Request, Response,
+    UartRequest, UartResponse,
 };
 
 mod emu;
@@ -210,6 +213,29 @@ impl Inner {
     }
 }
 
+impl FpgaOps for Proxy {
+    fn load_bitstream(&self, bitstream: &[u8], _progress: &dyn ProgressIndicator) -> Result<()> {
+        match self
+            .inner
+            .execute_command(Request::Fpga(FpgaRequest::LoadBitstream {
+                bitstream: bitstream.to_owned(),
+            }))? {
+            Response::Fpga(FgpaResponse::LoadBitstream) => Ok(()),
+            _ => bail!(ProxyError::UnexpectedReply()),
+        }
+    }
+
+    fn clear_bitstream(&self) -> Result<()> {
+        match self
+            .inner
+            .execute_command(Request::Fpga(FpgaRequest::ClearBitstream))?
+        {
+            Response::Fpga(FgpaResponse::ClearBitstream) => Ok(()),
+            _ => bail!(ProxyError::UnexpectedReply()),
+        }
+    }
+}
+
 impl ProxyOps for Proxy {
     fn provides_map(&self) -> Result<HashMap<String, String>> {
         match self
@@ -339,6 +365,10 @@ impl Transport for Proxy {
         Ok(self)
     }
 
+    fn fpga_ops(&self) -> Result<&dyn FpgaOps> {
+        Ok(self)
+    }
+
     // Create ProxyOps instance.
     fn proxy_ops(&self) -> Result<&dyn ProxyOps> {
         Ok(self)