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AMDGPU: Remove Formatted MUBUF instructions from gfx1250 support (#145590)
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4 files changed

+109
-8
lines changed

4 files changed

+109
-8
lines changed

llvm/lib/Target/AMDGPU/AMDGPU.td

Lines changed: 3 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -2357,6 +2357,9 @@ def NotLDSRequiresM0Init : Predicate<"!Subtarget->ldsRequiresM0Init()">;
23572357
def HasMTBUFInsts : Predicate<"Subtarget->hasMTBUFInsts()">,
23582358
AssemblerPredicate<(all_of (not FeatureGFX1250Insts))>;
23592359

2360+
def HasFormattedMUBUFInsts : Predicate<"Subtarget->hasFormattedMUBUFInsts()">,
2361+
AssemblerPredicate<(all_of (not FeatureGFX1250Insts))>;
2362+
23602363
def HasExportInsts : Predicate<"Subtarget->hasExportInsts()">,
23612364
AssemblerPredicate<(all_of (not FeatureGFX90AInsts))>;
23622365

llvm/lib/Target/AMDGPU/BUFInstructions.td

Lines changed: 18 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -845,9 +845,12 @@ multiclass MUBUF_Pseudo_Atomics <string opName,
845845
// MUBUF Instructions
846846
//===----------------------------------------------------------------------===//
847847

848+
let OtherPredicates = [HasFormattedMUBUFInsts] in
848849
defm BUFFER_LOAD_FORMAT_X : MUBUF_Pseudo_Loads_Lds <
849850
"buffer_load_format_x", f32
850851
>;
852+
853+
let SubtargetPredicate = HasFormattedMUBUFInsts in {
851854
defm BUFFER_LOAD_FORMAT_XY : MUBUF_Pseudo_Loads <
852855
"buffer_load_format_xy", v2f32
853856
>;
@@ -927,6 +930,7 @@ let TiedSourceNotRead = 1 in {
927930
"buffer_store_format_d16_xyzw", v4f16
928931
>;
929932
} // End OtherPredicates = [HasPackedD16VMem], D16Buf = 1.
933+
} // End SubtargetPredicate = HasFormattedMUBUFInsts.
930934

931935
defm BUFFER_LOAD_UBYTE : MUBUF_Pseudo_Loads_Lds <
932936
"buffer_load_ubyte", i32
@@ -1172,6 +1176,7 @@ defm BUFFER_LOAD_SHORT_D16_HI : MUBUF_Pseudo_Loads <
11721176
"buffer_load_short_d16_hi", i32, 1
11731177
>;
11741178

1179+
let OtherPredicates = [HasFormattedMUBUFInsts] in
11751180
defm BUFFER_LOAD_FORMAT_D16_HI_X : MUBUF_Pseudo_Loads <
11761181
"buffer_load_format_d16_hi_x", i32
11771182
>;
@@ -1185,6 +1190,7 @@ defm BUFFER_STORE_SHORT_D16_HI : MUBUF_Pseudo_Stores <
11851190
"buffer_store_short_d16_hi", i32
11861191
>;
11871192

1193+
let OtherPredicates = [HasFormattedMUBUFInsts] in
11881194
defm BUFFER_STORE_FORMAT_D16_HI_X : MUBUF_Pseudo_Stores <
11891195
"buffer_store_format_d16_hi_x", i32
11901196
>;
@@ -1366,6 +1372,7 @@ multiclass MUBUF_LoadIntrinsicPat<SDPatternOperator name, ValueType vt,
13661372
defm : MUBUF_LoadIntrinsicPat_Common<name, vt, opcode # "_VBUFFER", memoryVt>;
13671373
}
13681374

1375+
let OtherPredicates = [HasFormattedMUBUFInsts] in {
13691376
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format, f32, "BUFFER_LOAD_FORMAT_X">;
13701377
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format, i32, "BUFFER_LOAD_FORMAT_X">;
13711378
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format, v2f32, "BUFFER_LOAD_FORMAT_XY">;
@@ -1379,17 +1386,18 @@ defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_tfe, v2i32, "BUFFER_LOAD_FORM
13791386
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_tfe, v3i32, "BUFFER_LOAD_FORMAT_XY_TFE">;
13801387
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_tfe, v4i32, "BUFFER_LOAD_FORMAT_XYZ_TFE">;
13811388
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_tfe, v5i32, "BUFFER_LOAD_FORMAT_XYZW_TFE">;
1389+
} // End OtherPredicates = [HasFormattedMUBUFInsts].
13821390

1383-
let OtherPredicates = [HasUnpackedD16VMem] in {
1391+
let OtherPredicates = [HasUnpackedD16VMem, HasFormattedMUBUFInsts] in {
13841392
defm : MUBUF_LoadIntrinsicPat_Common<SIbuffer_load_format_d16, f16, "BUFFER_LOAD_FORMAT_D16_X_gfx80">;
13851393
defm : MUBUF_LoadIntrinsicPat_Common<SIbuffer_load_format_d16, i16, "BUFFER_LOAD_FORMAT_D16_X_gfx80">;
13861394
defm : MUBUF_LoadIntrinsicPat_Common<SIbuffer_load_format_d16, i32, "BUFFER_LOAD_FORMAT_D16_X_gfx80">;
13871395
defm : MUBUF_LoadIntrinsicPat_Common<SIbuffer_load_format_d16, v2i32, "BUFFER_LOAD_FORMAT_D16_XY_gfx80">;
13881396
defm : MUBUF_LoadIntrinsicPat_Common<SIbuffer_load_format_d16, v3i32, "BUFFER_LOAD_FORMAT_D16_XYZ_gfx80">;
13891397
defm : MUBUF_LoadIntrinsicPat_Common<SIbuffer_load_format_d16, v4i32, "BUFFER_LOAD_FORMAT_D16_XYZW_gfx80">;
1390-
} // End HasUnpackedD16VMem.
1398+
} // End OtherPredicates = [HasUnpackedD16VMem, HasFormattedMUBUFInsts].
13911399

1392-
let OtherPredicates = [HasPackedD16VMem] in {
1400+
let OtherPredicates = [HasPackedD16VMem, HasFormattedMUBUFInsts] in {
13931401
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_d16, f16, "BUFFER_LOAD_FORMAT_D16_X">;
13941402
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_d16, i16, "BUFFER_LOAD_FORMAT_D16_X">;
13951403
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_d16, i32, "BUFFER_LOAD_FORMAT_D16_X">;
@@ -1399,7 +1407,7 @@ let OtherPredicates = [HasPackedD16VMem] in {
13991407
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_d16, v4i16, "BUFFER_LOAD_FORMAT_D16_XYZ", v3i16>;
14001408
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_d16, v4f16, "BUFFER_LOAD_FORMAT_D16_XYZW">;
14011409
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load_format_d16, v4i16, "BUFFER_LOAD_FORMAT_D16_XYZW">;
1402-
} // End HasPackedD16VMem.
1410+
} // End OtherPredicates = [HasPackedD16VMem, HasFormattedMUBUFInsts].
14031411

14041412
foreach vt = Reg32Types.types in {
14051413
defm : MUBUF_LoadIntrinsicPat<SIbuffer_load, vt, "BUFFER_LOAD_DWORD">;
@@ -1475,6 +1483,7 @@ multiclass MUBUF_StoreIntrinsicPat<SDPatternOperator name, ValueType vt,
14751483
defm : MUBUF_StoreIntrinsicPat_Common<name, vt, opcode # "_VBUFFER", memoryVt>;
14761484
}
14771485

1486+
let OtherPredicates = [HasFormattedMUBUFInsts] in {
14781487
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, f32, "BUFFER_STORE_FORMAT_X">;
14791488
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, i32, "BUFFER_STORE_FORMAT_X">;
14801489
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, v2f32, "BUFFER_STORE_FORMAT_XY">;
@@ -1484,17 +1493,18 @@ defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, v3f32, "BUFFER_STORE_FORMA
14841493
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, v3i32, "BUFFER_STORE_FORMAT_XYZ">;
14851494
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, v4f32, "BUFFER_STORE_FORMAT_XYZW">;
14861495
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format, v4i32, "BUFFER_STORE_FORMAT_XYZW">;
1496+
} // End OtherPredicates = [HasFormattedMUBUFInsts].
14871497

1488-
let OtherPredicates = [HasUnpackedD16VMem] in {
1498+
let OtherPredicates = [HasUnpackedD16VMem, HasFormattedMUBUFInsts] in {
14891499
defm : MUBUF_StoreIntrinsicPat_Common<SIbuffer_store_format_d16, f16, "BUFFER_STORE_FORMAT_D16_X_gfx80">;
14901500
defm : MUBUF_StoreIntrinsicPat_Common<SIbuffer_store_format_d16, i16, "BUFFER_STORE_FORMAT_D16_X_gfx80">;
14911501
defm : MUBUF_StoreIntrinsicPat_Common<SIbuffer_store_format_d16, i32, "BUFFER_STORE_FORMAT_D16_X_gfx80">;
14921502
defm : MUBUF_StoreIntrinsicPat_Common<SIbuffer_store_format_d16, v2i32, "BUFFER_STORE_FORMAT_D16_XY_gfx80">;
14931503
defm : MUBUF_StoreIntrinsicPat_Common<SIbuffer_store_format_d16, v3i32, "BUFFER_STORE_FORMAT_D16_XYZ_gfx80">;
14941504
defm : MUBUF_StoreIntrinsicPat_Common<SIbuffer_store_format_d16, v4i32, "BUFFER_STORE_FORMAT_D16_XYZW_gfx80">;
1495-
} // End HasUnpackedD16VMem.
1505+
} // End OtherPredicates = [HasUnpackedD16VMem, HasFormattedMUBUFInsts].
14961506

1497-
let OtherPredicates = [HasPackedD16VMem] in {
1507+
let OtherPredicates = [HasPackedD16VMem, HasFormattedMUBUFInsts] in {
14981508
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format_d16, f16, "BUFFER_STORE_FORMAT_D16_X">;
14991509
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format_d16, i16, "BUFFER_STORE_FORMAT_D16_X">;
15001510
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format_d16, i32, "BUFFER_STORE_FORMAT_D16_X">;
@@ -1504,7 +1514,7 @@ let OtherPredicates = [HasPackedD16VMem] in {
15041514
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format_d16, v4i16, "BUFFER_STORE_FORMAT_D16_XYZ", v3i16>;
15051515
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format_d16, v4f16, "BUFFER_STORE_FORMAT_D16_XYZW">;
15061516
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store_format_d16, v4i16, "BUFFER_STORE_FORMAT_D16_XYZW">;
1507-
} // End HasPackedD16VMem.
1517+
} // End OtherPredicates = [HasPackedD16VMem, HasFormattedMUBUFInsts].
15081518

15091519
foreach vt = Reg32Types.types in {
15101520
defm : MUBUF_StoreIntrinsicPat<SIbuffer_store, vt, "BUFFER_STORE_DWORD">;

llvm/lib/Target/AMDGPU/GCNSubtarget.h

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -691,6 +691,8 @@ class GCNSubtarget final : public AMDGPUGenSubtargetInfo,
691691

692692
bool hasMTBUFInsts() const { return !hasGFX1250Insts(); }
693693

694+
bool hasFormattedMUBUFInsts() const { return !hasGFX1250Insts(); }
695+
694696
bool hasExportInsts() const {
695697
return !hasGFX940Insts();
696698
}

llvm/test/MC/AMDGPU/gfx1250_asm_unsupported.s

Lines changed: 86 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -1,5 +1,7 @@
11
; RUN: not llvm-mc -triple=amdgcn -mcpu=gfx1250 -show-encoding %s 2>&1 | FileCheck --check-prefix=GFX1250-ERR --implicit-check-not=error: --strict-whitespace %s
22

3+
;; All "TBUFFER" ops, and BUFFER_LOAD/STORE_FORMAT ops.
4+
35
tbuffer_load_d16_format_x v4, off, s[8:11], s3 format:[BUF_FMT_8_UNORM] offset:8388607
46
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
57

@@ -47,3 +49,87 @@ tbuffer_store_format_xyz v[4:6], off, s[8:11], s3 format:[BUF_FMT_32_FLOAT] offs
4749

4850
tbuffer_store_format_xyzw v[4:7], off, s[8:11], s3 format:[BUF_FMT_2_10_10_10_SNORM] offset:8388607
4951
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
52+
53+
buffer_load_d16_format_x v5, off, s[8:11], s3 offset:8388607
54+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
55+
56+
buffer_load_d16_format_xy v5, off, s[8:11], s3 offset:8388607
57+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
58+
59+
buffer_load_d16_format_xyz v[5:6], off, s[8:11], s3 offset:8388607
60+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
61+
62+
buffer_load_d16_format_xyzw v[5:6], off, s[8:11], s3 offset:8388607
63+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
64+
65+
buffer_load_d16_hi_format_x v5, off, s[8:11], s3 offset:8388607
66+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
67+
68+
buffer_load_format_x v5, off, s[8:11], s3 offset:8388607
69+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
70+
71+
buffer_load_format_xy v[5:6], off, s[8:11], s3 offset:8388607
72+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
73+
74+
buffer_load_format_xyz v[5:7], off, s[8:11], s3 offset:8388607
75+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
76+
77+
buffer_load_format_xyzw v[5:8], off, s[8:11], s3 offset:8388607
78+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
79+
80+
buffer_store_d16_format_x v1, off, s[12:15], s4 offset:8388607
81+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
82+
83+
buffer_store_d16_format_xy v1, off, s[12:15], s4 offset:8388607
84+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
85+
86+
buffer_store_d16_format_xyz v[1:2], off, s[12:15], s4 offset:8388607
87+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
88+
89+
buffer_store_d16_format_xyzw v[1:2], off, s[12:15], s4 offset:8388607
90+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
91+
92+
buffer_store_d16_hi_format_x v1, off, s[12:15], s4 offset:8388607
93+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
94+
95+
buffer_store_format_x v1, off, s[12:15], s4 offset:8388607
96+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
97+
98+
buffer_store_format_xy v[1:2], off, s[12:15], s4 offset:8388607
99+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
100+
101+
buffer_store_format_xyz v[1:3], off, s[12:15], s4 offset:8388607
102+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
103+
104+
buffer_store_format_xyzw v[1:4], off, s[12:15], s4 offset:8388607
105+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
106+
107+
buffer_load_format_d16_x v5, off, s[8:11], s3 offset:8388607
108+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
109+
110+
buffer_load_format_d16_xy v5, off, s[8:11], s3 offset:8388607
111+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
112+
113+
buffer_load_format_d16_xyz v[5:6], off, s[8:11], s3 offset:8388607
114+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
115+
116+
buffer_load_format_d16_xyzw v[5:6], off, s[8:11], s3 offset:8388607
117+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
118+
119+
buffer_load_format_d16_hi_x v5, off, s[8:11], s3 offset:8388607
120+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
121+
122+
buffer_store_format_d16_x v1, off, s[12:15], s4 offset:8388607
123+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
124+
125+
buffer_store_format_d16_xy v1, off, s[12:15], s4 offset:8388607
126+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
127+
128+
buffer_store_format_d16_xyz v[1:2], off, s[12:15], s4 offset:8388607
129+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
130+
131+
buffer_store_format_d16_xyzw v[1:2], off, s[12:15], s4 offset:8388607
132+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU
133+
134+
buffer_store_format_d16_hi_x v1, off, s[12:15], s4 offset:8388607
135+
// GFX1250-ERR: :[[@LINE-1]]:{{[0-9]+}}: error: instruction not supported on this GPU

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