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AMDGPU: Avoid report_fatal_error for getRegisterByName subtarget case (#145173)
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2 files changed

+6
-4
lines changed

2 files changed

+6
-4
lines changed

llvm/lib/Target/AMDGPU/SIISelLowering.cpp

Lines changed: 4 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -4481,6 +4481,8 @@ SDValue SITargetLowering::lowerSET_FPENV(SDValue Op, SelectionDAG &DAG) const {
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44824482
Register SITargetLowering::getRegisterByName(const char *RegName, LLT VT,
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const MachineFunction &MF) const {
4484+
const Function &Fn = MF.getFunction();
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Register Reg = StringSwitch<Register>(RegName)
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.Case("m0", AMDGPU::M0)
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.Case("exec", AMDGPU::EXEC)
@@ -4498,8 +4500,8 @@ Register SITargetLowering::getRegisterByName(const char *RegName, LLT VT,
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if (!Subtarget->hasFlatScrRegister() &&
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Subtarget->getRegisterInfo()->regsOverlap(Reg, AMDGPU::FLAT_SCR)) {
4501-
report_fatal_error(Twine("invalid register \"" + StringRef(RegName) +
4502-
"\" for subtarget."));
4503+
Fn.getContext().emitError(Twine("invalid register \"" + StringRef(RegName) +
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"\" for subtarget."));
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}
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switch (Reg) {

llvm/test/CodeGen/AMDGPU/read-register-invalid-subtarget.ll

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,6 @@
1-
; RUN: not --crash llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
1+
; RUN: not llc -mtriple=amdgcn -mcpu=tahiti -verify-machineinstrs < %s 2>&1 | FileCheck %s
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3-
; CHECK: invalid register "flat_scratch_lo" for subtarget.
3+
; CHECK: error: invalid register "flat_scratch_lo" for subtarget.
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declare i32 @llvm.read_register.i32(metadata) #0
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