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[AMDGPU][GlobalISel] Add RegBankLegalize support for G_BITREVERSE (#172101)
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-25
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3 files changed

+35
-25
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‎llvm/lib/Target/AMDGPU/AMDGPURegBankLegalizeRules.cpp‎

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -922,6 +922,12 @@ RegBankLegalizeRules::RegBankLegalizeRules(const GCNSubtarget &_ST,
922922

923923
addRulesForGOpcs({G_ABS}, Standard).Uni(S16, {{Sgpr32Trunc}, {Sgpr32SExt}});
924924

925+
addRulesForGOpcs({G_BITREVERSE}, Standard)
926+
.Uni(S32, {{Sgpr32}, {Sgpr32}})
927+
.Div(S32, {{Vgpr32}, {Vgpr32}})
928+
.Uni(S64, {{Sgpr64}, {Sgpr64}})
929+
.Div(S64, {{Vgpr64}, {Vgpr64}});
930+
925931
addRulesForGOpcs({G_FENCE}).Any({{{}}, {{}, {}}});
926932

927933
addRulesForGOpcs({G_READSTEADYCOUNTER, G_READCYCLECOUNTER}, Standard)

‎llvm/test/CodeGen/AMDGPU/GlobalISel/regbankselect-bitreverse.mir‎

Lines changed: 2 additions & 6 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,5 @@
11
# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
2-
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-fast | FileCheck %s
3-
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass=regbankselect %s -verify-machineinstrs -o - -regbankselect-greedy | FileCheck %s
2+
# RUN: llc -mtriple=amdgcn -mcpu=fiji -run-pass="amdgpu-regbankselect,amdgpu-regbanklegalize" %s -verify-machineinstrs -o - | FileCheck %s
43

54
---
65
name: bitreverse_i32_s
@@ -61,10 +60,7 @@ body: |
6160
; CHECK: liveins: $vgpr0
6261
; CHECK-NEXT: {{ $}}
6362
; CHECK-NEXT: [[COPY:%[0-9]+]]:vgpr(s64) = COPY $vgpr0_vgpr1
64-
; CHECK-NEXT: [[UV:%[0-9]+]]:vgpr(s32), [[UV1:%[0-9]+]]:vgpr(s32) = G_UNMERGE_VALUES [[COPY]](s64)
65-
; CHECK-NEXT: [[BITREVERSE:%[0-9]+]]:vgpr(s32) = G_BITREVERSE [[UV1]]
66-
; CHECK-NEXT: [[BITREVERSE1:%[0-9]+]]:vgpr(s32) = G_BITREVERSE [[UV]]
67-
; CHECK-NEXT: [[MV:%[0-9]+]]:vgpr(s64) = G_MERGE_VALUES [[BITREVERSE]](s32), [[BITREVERSE1]](s32)
63+
; CHECK-NEXT: [[BITREVERSE:%[0-9]+]]:vgpr(s64) = G_BITREVERSE [[COPY]]
6864
%0:_(s64) = COPY $vgpr0_vgpr1
6965
%1:_(s64) = G_BITREVERSE %0
7066
...

‎llvm/test/CodeGen/AMDGPU/bitreverse.ll‎

Lines changed: 27 additions & 19 deletions
Original file line numberDiff line numberDiff line change
@@ -2,11 +2,11 @@
22
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=tahiti | FileCheck %s --check-prefix=SI
33
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=tonga -mattr=-flat-for-global | FileCheck %s --check-prefix=FLAT
44
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=fiji -mattr=-flat-for-global | FileCheck %s --check-prefix=FLAT
5-
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=fiji -global-isel | FileCheck %s --check-prefix=GISEL
5+
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=fiji -global-isel -new-reg-bank-select | FileCheck %s --check-prefix=GISEL
66
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 -mattr=-flat-for-global | FileCheck %s --check-prefixes=GFX11-FLAT,GFX11-FLAT-TRUE16
77
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=-real-true16 -mattr=-flat-for-global | FileCheck %s --check-prefixes=GFX11-FLAT,GFX11-FLAT-FAKE16
8-
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 -global-isel | FileCheck %s --check-prefixes=GFX11-GISEL,GFX11-GISEL-TRUE16
9-
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=-real-true16 -global-isel | FileCheck %s --check-prefixes=GFX11-GISEL,GFX11-GISEL-FAKE16
8+
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=+real-true16 -global-isel -new-reg-bank-select | FileCheck %s --check-prefixes=GFX11-GISEL,GFX11-GISEL-TRUE16
9+
; RUN: llc < %s -mtriple=amdgcn-- -mcpu=gfx1100 -mattr=-real-true16 -global-isel -new-reg-bank-select | FileCheck %s --check-prefixes=GFX11-GISEL,GFX11-GISEL-FAKE16
1010

1111
declare i32 @llvm.amdgcn.workitem.id.x() #1
1212

@@ -151,9 +151,11 @@ define amdgpu_kernel void @v_brev_i16(ptr addrspace(1) noalias %out, ptr addrspa
151151
; GISEL-NEXT: v_mov_b32_e32 v1, s3
152152
; GISEL-NEXT: flat_load_ushort v0, v[0:1]
153153
; GISEL-NEXT: s_waitcnt vmcnt(0)
154-
; GISEL-NEXT: v_bfrev_b32_e32 v0, v0
155-
; GISEL-NEXT: v_lshrrev_b32_e32 v2, 16, v0
154+
; GISEL-NEXT: v_readfirstlane_b32 s2, v0
155+
; GISEL-NEXT: s_brev_b32 s2, s2
156+
; GISEL-NEXT: s_lshr_b32 s2, s2, 16
156157
; GISEL-NEXT: v_mov_b32_e32 v0, s0
158+
; GISEL-NEXT: v_mov_b32_e32 v2, s2
157159
; GISEL-NEXT: v_mov_b32_e32 v1, s1
158160
; GISEL-NEXT: flat_store_short v[0:1], v2
159161
; GISEL-NEXT: s_endpgm
@@ -176,14 +178,16 @@ define amdgpu_kernel void @v_brev_i16(ptr addrspace(1) noalias %out, ptr addrspa
176178
; GFX11-GISEL-TRUE16-LABEL: v_brev_i16:
177179
; GFX11-GISEL-TRUE16: ; %bb.0:
178180
; GFX11-GISEL-TRUE16-NEXT: s_load_b128 s[0:3], s[4:5], 0x24
179-
; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v0, 0
181+
; GFX11-GISEL-TRUE16-NEXT: v_mov_b32_e32 v1, 0
180182
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt lgkmcnt(0)
181-
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v1, v0, s[2:3]
183+
; GFX11-GISEL-TRUE16-NEXT: global_load_u16 v0, v1, s[2:3]
182184
; GFX11-GISEL-TRUE16-NEXT: s_waitcnt vmcnt(0)
183-
; GFX11-GISEL-TRUE16-NEXT: v_bfrev_b32_e32 v1, v1
184-
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(VALU_DEP_1)
185-
; GFX11-GISEL-TRUE16-NEXT: v_lshrrev_b32_e32 v1, 16, v1
186-
; GFX11-GISEL-TRUE16-NEXT: global_store_b16 v0, v1, s[0:1]
185+
; GFX11-GISEL-TRUE16-NEXT: v_readfirstlane_b32 s2, v0
186+
; GFX11-GISEL-TRUE16-NEXT: s_brev_b32 s2, s2
187+
; GFX11-GISEL-TRUE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
188+
; GFX11-GISEL-TRUE16-NEXT: s_lshr_b32 s2, s2, 16
189+
; GFX11-GISEL-TRUE16-NEXT: v_mov_b16_e32 v0.l, s2
190+
; GFX11-GISEL-TRUE16-NEXT: global_store_b16 v1, v0, s[0:1]
187191
; GFX11-GISEL-TRUE16-NEXT: s_endpgm
188192
;
189193
; GFX11-GISEL-FAKE16-LABEL: v_brev_i16:
@@ -193,8 +197,12 @@ define amdgpu_kernel void @v_brev_i16(ptr addrspace(1) noalias %out, ptr addrspa
193197
; GFX11-GISEL-FAKE16-NEXT: s_waitcnt lgkmcnt(0)
194198
; GFX11-GISEL-FAKE16-NEXT: global_load_u16 v1, v0, s[2:3]
195199
; GFX11-GISEL-FAKE16-NEXT: s_waitcnt vmcnt(0)
196-
; GFX11-GISEL-FAKE16-NEXT: v_bfrev_b32_e32 v1, v1
197-
; GFX11-GISEL-FAKE16-NEXT: global_store_d16_hi_b16 v0, v1, s[0:1]
200+
; GFX11-GISEL-FAKE16-NEXT: v_readfirstlane_b32 s2, v1
201+
; GFX11-GISEL-FAKE16-NEXT: s_brev_b32 s2, s2
202+
; GFX11-GISEL-FAKE16-NEXT: s_delay_alu instid0(SALU_CYCLE_1) | instskip(NEXT) | instid1(SALU_CYCLE_1)
203+
; GFX11-GISEL-FAKE16-NEXT: s_lshr_b32 s2, s2, 16
204+
; GFX11-GISEL-FAKE16-NEXT: v_mov_b32_e32 v1, s2
205+
; GFX11-GISEL-FAKE16-NEXT: global_store_b16 v0, v1, s[0:1]
198206
; GFX11-GISEL-FAKE16-NEXT: s_endpgm
199207
%val = load i16, ptr addrspace(1) %valptr
200208
%brev = call i16 @llvm.bitreverse.i16(i16 %val) #1
@@ -641,8 +649,8 @@ define amdgpu_kernel void @v_brev_i64(ptr addrspace(1) noalias %out, ptr addrspa
641649
; GISEL-NEXT: v_mov_b32_e32 v4, s1
642650
; GISEL-NEXT: v_mov_b32_e32 v3, s0
643651
; GISEL-NEXT: s_waitcnt vmcnt(0)
644-
; GISEL-NEXT: v_bfrev_b32_e32 v1, v1
645652
; GISEL-NEXT: v_bfrev_b32_e32 v2, v0
653+
; GISEL-NEXT: v_bfrev_b32_e32 v1, v1
646654
; GISEL-NEXT: flat_store_dwordx2 v[3:4], v[1:2]
647655
; GISEL-NEXT: s_endpgm
648656
;
@@ -671,8 +679,8 @@ define amdgpu_kernel void @v_brev_i64(ptr addrspace(1) noalias %out, ptr addrspa
671679
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
672680
; GFX11-GISEL-NEXT: global_load_b64 v[0:1], v0, s[2:3]
673681
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
674-
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v1, v1
675682
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v2, v0
683+
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v1, v1
676684
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
677685
; GFX11-GISEL-NEXT: global_store_b64 v0, v[1:2], s[0:1]
678686
; GFX11-GISEL-NEXT: s_endpgm
@@ -819,11 +827,11 @@ define amdgpu_kernel void @v_brev_v2i64(ptr addrspace(1) noalias %out, ptr addrs
819827
; GISEL-NEXT: v_addc_u32_e32 v1, vcc, 0, v1, vcc
820828
; GISEL-NEXT: flat_load_dwordx4 v[0:3], v[0:1]
821829
; GISEL-NEXT: s_waitcnt vmcnt(0)
822-
; GISEL-NEXT: v_bfrev_b32_e32 v4, v1
823830
; GISEL-NEXT: v_bfrev_b32_e32 v5, v0
831+
; GISEL-NEXT: v_bfrev_b32_e32 v4, v1
824832
; GISEL-NEXT: v_mov_b32_e32 v0, s0
825-
; GISEL-NEXT: v_bfrev_b32_e32 v6, v3
826833
; GISEL-NEXT: v_bfrev_b32_e32 v7, v2
834+
; GISEL-NEXT: v_bfrev_b32_e32 v6, v3
827835
; GISEL-NEXT: v_mov_b32_e32 v1, s1
828836
; GISEL-NEXT: flat_store_dwordx4 v[0:1], v[4:7]
829837
; GISEL-NEXT: s_endpgm
@@ -855,10 +863,10 @@ define amdgpu_kernel void @v_brev_v2i64(ptr addrspace(1) noalias %out, ptr addrs
855863
; GFX11-GISEL-NEXT: s_waitcnt lgkmcnt(0)
856864
; GFX11-GISEL-NEXT: global_load_b128 v[0:3], v0, s[2:3]
857865
; GFX11-GISEL-NEXT: s_waitcnt vmcnt(0)
858-
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v4, v1
859866
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v5, v0
860-
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v6, v3
867+
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v4, v1
861868
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v7, v2
869+
; GFX11-GISEL-NEXT: v_bfrev_b32_e32 v6, v3
862870
; GFX11-GISEL-NEXT: v_mov_b32_e32 v0, 0
863871
; GFX11-GISEL-NEXT: global_store_b128 v0, v[4:7], s[0:1]
864872
; GFX11-GISEL-NEXT: s_endpgm

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